Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef _ASM_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define _ASM_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/pgtable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define virt_to_phys(a) ((unsigned long)__pa(a))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define phys_to_virt(a) __va(a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define virt_to_bus virt_to_phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define bus_to_virt phys_to_virt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) static inline unsigned long isa_bus_to_virt(unsigned long addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) static inline unsigned long isa_virt_to_bus(void *addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * Memory mapped I/O
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * readX()/writeX() do byteswapping and take an ioremapped address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * gsc_*() don't byteswap and operate on physical addresses;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  *   eg dev->hpa or 0xfee00000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) static inline unsigned char gsc_readb(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	unsigned char ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	"	rsm	%3,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	"	ldbx	0(%2),%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	"	mtsm	%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static inline unsigned short gsc_readw(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	unsigned short ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	"	rsm	%3,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	"	ldhx	0(%2),%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	"	mtsm	%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static inline unsigned int gsc_readl(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u32 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	"	ldwax	0(%1),%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	: "=r" (ret) : "r" (addr) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static inline unsigned long long gsc_readq(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	unsigned long long ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	"	ldda	0(%1),%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	:  "=r" (ret) : "r" (addr) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	/* two reads may have side effects.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	ret = ((u64) gsc_readl(addr)) << 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	ret |= gsc_readl(addr+4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static inline void gsc_writeb(unsigned char val, unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	"	rsm	%3,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	"	stbs	%1,0(%2)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	"	mtsm	%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) static inline void gsc_writew(unsigned short val, unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	"	rsm	%3,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	"	sths	%1,0(%2)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	"	mtsm	%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static inline void gsc_writel(unsigned int val, unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	"	stwas	%0,0(%1)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	: :  "r" (val), "r" (addr) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static inline void gsc_writeq(unsigned long long val, unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	"	stda	%0,0(%1)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	: :  "r" (val), "r" (addr) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	/* two writes may have side effects.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	gsc_writel(val >> 32, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	gsc_writel(val, addr+4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)  * The standard PCI ioremap interfaces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) void __iomem *ioremap(unsigned long offset, unsigned long size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define ioremap_wc			ioremap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define ioremap_uc			ioremap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) extern void iounmap(const volatile void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static inline unsigned char __raw_readb(const volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	return (*(volatile unsigned char __force *) (addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static inline unsigned short __raw_readw(const volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	return *(volatile unsigned short __force *) addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static inline unsigned int __raw_readl(const volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	return *(volatile unsigned int __force *) addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	return *(volatile unsigned long long __force *) addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	*(volatile unsigned char __force *) addr = b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	*(volatile unsigned short __force *) addr = b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	*(volatile unsigned int __force *) addr = b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	*(volatile unsigned long long __force *) addr = b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static inline unsigned char readb(const volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	return __raw_readb(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static inline unsigned short readw(const volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return le16_to_cpu((__le16 __force) __raw_readw(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static inline unsigned int readl(const volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	return le32_to_cpu((__le32 __force) __raw_readl(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static inline unsigned long long readq(const volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return le64_to_cpu((__le64 __force) __raw_readq(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static inline void writeb(unsigned char b, volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	__raw_writeb(b, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static inline void writew(unsigned short w, volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	__raw_writew((__u16 __force) cpu_to_le16(w), addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static inline void writel(unsigned int l, volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	__raw_writel((__u32 __force) cpu_to_le32(l), addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static inline void writeq(unsigned long long q, volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	__raw_writeq((__u64 __force) cpu_to_le64(q), addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define	readb	readb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define	readw	readw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define	readl	readl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define readq	readq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define writeb	writeb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define writew	writew
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define writel	writel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define writeq	writeq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define readb_relaxed(addr)	readb(addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define readw_relaxed(addr)	readw(addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define readl_relaxed(addr)	readl(addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define readq_relaxed(addr)	readq(addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define writeb_relaxed(b, addr)	writeb(b, addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define writew_relaxed(w, addr)	writew(w, addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define writel_relaxed(l, addr)	writel(l, addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define writeq_relaxed(q, addr)	writeq(q, addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) void memset_io(volatile void __iomem *addr, unsigned char val, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* Port-space IO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define inb_p inb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define inw_p inw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define inl_p inl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define outb_p outb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define outw_p outw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define outl_p outl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) extern unsigned char eisa_in8(unsigned short port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) extern unsigned short eisa_in16(unsigned short port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) extern unsigned int eisa_in32(unsigned short port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) extern void eisa_out8(unsigned char data, unsigned short port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) extern void eisa_out16(unsigned short data, unsigned short port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) extern void eisa_out32(unsigned int data, unsigned short port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #if defined(CONFIG_PCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) extern unsigned char inb(int addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) extern unsigned short inw(int addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) extern unsigned int inl(int addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) extern void outb(unsigned char b, int addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) extern void outw(unsigned short b, int addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) extern void outl(unsigned int b, int addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #elif defined(CONFIG_EISA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define inb eisa_in8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define inw eisa_in16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define inl eisa_in32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define outb eisa_out8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define outw eisa_out16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define outl eisa_out32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static inline char inb(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static inline short inw(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static inline int inl(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define outb(x, y)	BUG()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define outw(x, y)	BUG()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define outl(x, y)	BUG()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)  * String versions of in/out ops:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) extern void insb (unsigned long port, void *dst, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) extern void insw (unsigned long port, void *dst, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) extern void insl (unsigned long port, void *dst, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) extern void outsb (unsigned long port, const void *src, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) extern void outsw (unsigned long port, const void *src, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) extern void outsl (unsigned long port, const void *src, unsigned long count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* IO Port space is :      BBiiii   where BB is HBA number. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define IO_SPACE_LIMIT 0x00ffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)  * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)  * mode (essentially just sign extending.  This macro takes in a 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)  * bit I/O address (still with the leading f) and outputs the correct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)  * value for either 32 or 64 bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define ioread64 ioread64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define ioread64be ioread64be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define iowrite64 iowrite64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define iowrite64be iowrite64be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) extern u64 ioread64(const void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) extern u64 ioread64be(const void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) extern void iowrite64(u64 val, void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) extern void iowrite64be(u64 val, void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #include <asm-generic/iomap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)  * access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define xlate_dev_mem_ptr(p)	__va(p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)  * Convert a virtual cached pointer to an uncached pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define xlate_dev_kmem_ptr(p)	p
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #endif