Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*    Architecture specific parts of the Floppy driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *    Linux/PA-RISC Project (http://www.parisc-linux.org/)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *    Copyright (C) 2000 Matthew Wilcox (willy a debian . org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *    Copyright (C) 2000 Dave Kennedy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #ifndef __ASM_PARISC_FLOPPY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define __ASM_PARISC_FLOPPY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * The DMA channel used by the floppy controller cannot access data at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * addresses >= 16MB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * Went back to the 1MB limit, as some people had problems with the floppy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * driver otherwise. It doesn't matter much for performance anyway, as most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * floppy accesses go through the track buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define _CROSS_64KB(a,s,vdma) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) (!(vdma) && ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define CROSS_64KB(a,s) _CROSS_64KB(a,s,use_virtual_dma & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define SW fd_routine[use_virtual_dma&1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define CSW fd_routine[can_use_virtual_dma & 1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define fd_inb(base, reg)		readb((base) + (reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define fd_outb(value, base, reg)	writeb(value, (base) + (reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define fd_request_dma()        CSW._request_dma(FLOPPY_DMA,"floppy")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define fd_free_dma()           CSW._free_dma(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define fd_enable_irq()         enable_irq(FLOPPY_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define fd_disable_irq()        disable_irq(FLOPPY_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define fd_free_irq()		free_irq(FLOPPY_IRQ, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define fd_get_dma_residue()    SW._get_dma_residue(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define fd_dma_mem_alloc(size)	SW._dma_mem_alloc(size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define FLOPPY_CAN_FALLBACK_ON_NODMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static int virtual_dma_count=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static int virtual_dma_residue=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static char *virtual_dma_addr=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static int virtual_dma_mode=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static int doing_pdma=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static void floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	register unsigned char st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #undef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	static int calls=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	static int bytes=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	static int dma_wait=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	if (!doing_pdma) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		floppy_interrupt(irq, dev_id, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	if(!calls)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		bytes = virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		register int lcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		register char *lptr = virtual_dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		for (lcount = virtual_dma_count; lcount; lcount--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			st = fd_inb(virtual_dma_port, FD_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			st &= STATUS_DMA | STATUS_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			if (st != (STATUS_DMA | STATUS_READY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			if (virtual_dma_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 				fd_outb(*lptr, virtual_dma_port, FD_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 				*lptr = fd_inb(virtual_dma_port, FD_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 			lptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		virtual_dma_count = lcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		virtual_dma_addr = lptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		st = fd_inb(virtual_dma_port, FD_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	calls++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (st == STATUS_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!(st & STATUS_DMA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		virtual_dma_residue += virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		virtual_dma_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		printk("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n", 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		       virtual_dma_count, virtual_dma_residue, calls, bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		       dma_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		calls = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		dma_wait=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		doing_pdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		floppy_interrupt(irq, dev_id, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (!virtual_dma_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		dma_wait++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static void fd_disable_dma(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if(! (can_use_virtual_dma & 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		disable_dma(FLOPPY_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	doing_pdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	virtual_dma_residue += virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	virtual_dma_count=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int vdma_request_dma(unsigned int dmanr, const char * device_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static void vdma_nop(unsigned int dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int vdma_get_dma_residue(unsigned int dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return virtual_dma_count + virtual_dma_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int fd_request_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if(can_use_virtual_dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		return request_irq(FLOPPY_IRQ, floppy_hardint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 				   0, "floppy", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		return request_irq(FLOPPY_IRQ, floppy_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 				   0, "floppy", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static unsigned long dma_mem_alloc(unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	return __get_dma_pages(GFP_KERNEL, get_order(size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static unsigned long vdma_mem_alloc(unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	return (unsigned long) vmalloc(size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define nodma_mem_alloc(size) vdma_mem_alloc(size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	if((unsigned int) addr >= (unsigned int) high_memory)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		return vfree((void *)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		free_pages(addr, get_order(size));		
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define fd_dma_mem_free(addr, size)  _fd_dma_mem_free(addr, size) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static void _fd_chose_dma_mode(char *addr, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if(can_use_virtual_dma == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		if((unsigned int) addr >= (unsigned int) high_memory ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		   virt_to_bus(addr) >= 0x1000000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		   _CROSS_64KB(addr, size, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			use_virtual_dma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 			use_virtual_dma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		use_virtual_dma = can_use_virtual_dma & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	doing_pdma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	virtual_dma_port = io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	virtual_dma_mode = (mode  == DMA_MODE_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	virtual_dma_addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	virtual_dma_count = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	virtual_dma_residue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #ifdef FLOPPY_SANITY_CHECK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	if (CROSS_64KB(addr, size)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	/* actual, physical DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	doing_pdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	clear_dma_ff(FLOPPY_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	set_dma_mode(FLOPPY_DMA,mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	set_dma_addr(FLOPPY_DMA,virt_to_bus(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	set_dma_count(FLOPPY_DMA,size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	enable_dma(FLOPPY_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static struct fd_routine_l {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	int (*_request_dma)(unsigned int dmanr, const char * device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	void (*_free_dma)(unsigned int dmanr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	int (*_get_dma_residue)(unsigned int dummy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	unsigned long (*_dma_mem_alloc) (unsigned long size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) } fd_routine[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		request_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		free_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		get_dma_residue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		dma_mem_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		hard_dma_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		vdma_request_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		vdma_nop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		vdma_get_dma_residue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		vdma_mem_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		vdma_dma_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int FDC1 = 0x3f0; /* Lies.  Floppy controller is memory mapped, not io mapped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int FDC2 = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define FLOPPY0_TYPE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define FLOPPY1_TYPE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define N_FDC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define N_DRIVE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define EXTRA_FLOPPY_PARAMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #endif /* __ASM_PARISC_FLOPPY_H */