Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * OpenRISC idle.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Linux architectural port borrowing liberally from similar works of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * others.  All original copyrights apply as per the original source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * declaration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Modifications for the OpenRISC architecture:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/mman.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/swap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/blkdev.h>	/* for initrd_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/pagemap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <asm/pgalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <asm/tlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <asm/mmu_context.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <asm/kmap_types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <asm/fixmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <asm/sections.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) int mem_init_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static void __init zone_sizes_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	 * We use only ZONE_NORMAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	max_zone_pfn[ZONE_NORMAL] = max_low_pfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	free_area_init(max_zone_pfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) extern const char _s_kernel_ro[], _e_kernel_ro[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * Map all physical memory into kernel's address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * This is explicitly coded for two-level page tables, so if you need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * something else then this needs to change.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static void __init map_ram(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	phys_addr_t start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	unsigned long v, p, e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	pgprot_t prot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	pgd_t *pge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	p4d_t *p4e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	pud_t *pue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	pmd_t *pme;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	pte_t *pte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	u64 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	/* These mark extents of read-only kernel pages...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	 * ...from vmlinux.lds.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	v = PAGE_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	for_each_mem_range(i, &start, &end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		p = (u32) start & PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		e = (u32) end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		v = (u32) __va(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		pge = pgd_offset_k(v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		while (p < e) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			p4e = p4d_offset(pge, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			pue = pud_offset(p4e, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 			pme = pmd_offset(pue, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			if ((u32) pue != (u32) pge || (u32) pme != (u32) pge) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 				panic("%s: OR1K kernel hardcoded for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 				      "two-level page tables",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				     __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			/* Alloc one page for holding PTE's... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			pte = memblock_alloc_raw(PAGE_SIZE, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			if (!pte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				panic("%s: Failed to allocate page for PTEs\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 				      __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			set_pmd(pme, __pmd(_KERNPG_TABLE + __pa(pte)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			/* Fill the newly allocated page with PTE'S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			for (j = 0; p < e && j < PTRS_PER_PTE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			     v += PAGE_SIZE, p += PAGE_SIZE, j++, pte++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 				if (v >= (u32) _e_kernel_ro ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 				    v < (u32) _s_kernel_ro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 					prot = PAGE_KERNEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 				else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 					prot = PAGE_KERNEL_RO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 				set_pte(pte, mk_pte_phys(p, prot));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			pge++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		       start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) void __init paging_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	extern void tlb_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	unsigned long end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	printk(KERN_INFO "Setting up paging and PTEs.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	/* clear out the init_mm.pgd that will contain the kernel's mappings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	for (i = 0; i < PTRS_PER_PGD; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		swapper_pg_dir[i] = __pgd(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	/* make sure the current pgd table points to something sane
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	 * (even if it is most probably not used until the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	 *  switch_mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	current_pgd[smp_processor_id()] = init_mm.pgd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	end = (unsigned long)__va(max_low_pfn * PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	map_ram();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	zone_sizes_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	/* self modifying code ;) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	/* Since the old TLB miss handler has been running up until now,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	 * the kernel pages are still all RW, so we can still modify the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	 * text directly... after this change and a TLB flush, the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	 * pages will become RO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		extern unsigned long dtlb_miss_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		extern unsigned long itlb_miss_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		unsigned long *dtlb_vector = __va(0x900);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		unsigned long *itlb_vector = __va(0xa00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		printk(KERN_INFO "itlb_miss_handler %p\n", &itlb_miss_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		*itlb_vector = ((unsigned long)&itlb_miss_handler -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 				(unsigned long)itlb_vector) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		/* Soft ordering constraint to ensure that dtlb_vector is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		 * the last thing updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		printk(KERN_INFO "dtlb_miss_handler %p\n", &dtlb_miss_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		*dtlb_vector = ((unsigned long)&dtlb_miss_handler -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 				(unsigned long)dtlb_vector) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	/* Soft ordering constraint to ensure that cache invalidation and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	 * TLB flush really happen _after_ code has been modified.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	/* Invalidate instruction caches after code modification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	mtspr(SPR_ICBIR, 0x900);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	mtspr(SPR_ICBIR, 0xa00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	/* New TLB miss handlers and kernel page tables are in now place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	 * Make sure that page flags get updated for all pages in TLB by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	 * flushing the TLB and forcing all TLB entries to be recreated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	 * from their page table flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	flush_tlb_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* References to section boundaries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) void __init mem_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	BUG_ON(!mem_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	max_mapnr = max_low_pfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	/* clear the zero-page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	memset((void *)empty_zero_page, 0, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	/* this will put all low memory onto the freelists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	memblock_free_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	mem_init_print_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	printk("mem_init_done ...........................................\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	mem_init_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }