Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * OpenRISC cache.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Linux architectural port borrowing liberally from similar works of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * others.  All original copyrights apply as per the original source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * declaration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Modifications for the OpenRISC architecture:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * Copyright (C) 2015 Jan Henrik Weinstock <jan.weinstock@rwth-aachen.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/spr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/spr_defs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static __always_inline void cache_loop(struct page *page, const unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	unsigned long paddr = page_to_pfn(page) << PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	unsigned long line = paddr & ~(L1_CACHE_BYTES - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	while (line < paddr + PAGE_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		mtspr(reg, line);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		line += L1_CACHE_BYTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void local_dcache_page_flush(struct page *page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	cache_loop(page, SPR_DCBFR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) EXPORT_SYMBOL(local_dcache_page_flush);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void local_icache_page_inv(struct page *page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	cache_loop(page, SPR_ICBIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) EXPORT_SYMBOL(local_icache_page_inv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void update_cache(struct vm_area_struct *vma, unsigned long address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	pte_t *pte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	unsigned long pfn = pte_val(*pte) >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	struct page *page = pfn_to_page(pfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	int dirty = !test_and_set_bit(PG_dc_clean, &page->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	 * Since icaches do not snoop for updated data on OpenRISC, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	 * must write back and invalidate any dirty pages manually. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	 * can skip data pages, since they will not end up in icaches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	if ((vma->vm_flags & VM_EXEC) && dirty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		sync_icache_dcache(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)