Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Copyright (C) 2013-2014 Altera Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2004 Microtronix Datacom Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define ALTR_TIMER_COMPATIBLE		"altr,timer-1.0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define ALTERA_TIMER_STATUS_REG	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define ALTERA_TIMER_CONTROL_REG	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define ALTERA_TIMER_PERIODL_REG	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ALTERA_TIMER_PERIODH_REG	12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define ALTERA_TIMER_SNAPL_REG		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define ALTERA_TIMER_SNAPH_REG		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define ALTERA_TIMER_CONTROL_ITO_MSK	(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ALTERA_TIMER_CONTROL_CONT_MSK	(0x2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ALTERA_TIMER_CONTROL_START_MSK	(0x4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define ALTERA_TIMER_CONTROL_STOP_MSK	(0x8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) struct nios2_timer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	unsigned long freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) struct nios2_clockevent_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct nios2_timer timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct clock_event_device ced;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) struct nios2_clocksource {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct nios2_timer timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct clocksource cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static inline struct nios2_clockevent_dev *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	to_nios2_clkevent(struct clock_event_device *evt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	return container_of(evt, struct nios2_clockevent_dev, ced);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static inline struct nios2_clocksource *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	to_nios2_clksource(struct clocksource *cs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	return container_of(cs, struct nios2_clocksource, cs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static u16 timer_readw(struct nios2_timer *timer, u32 offs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	return readw(timer->base + offs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static void timer_writew(struct nios2_timer *timer, u16 val, u32 offs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	writew(val, timer->base + offs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static inline unsigned long read_timersnapshot(struct nios2_timer *timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	unsigned long count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	count = timer_readw(timer, ALTERA_TIMER_SNAPH_REG) << 16 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		timer_readw(timer, ALTERA_TIMER_SNAPL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static u64 nios2_timer_read(struct clocksource *cs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct nios2_clocksource *nios2_cs = to_nios2_clksource(cs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	u32 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	count = read_timersnapshot(&nios2_cs->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	/* Counter is counting down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	return ~count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static struct nios2_clocksource nios2_cs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.cs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		.name	= "nios2-clksrc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		.rating	= 250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		.read	= nios2_timer_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		.mask	= CLOCKSOURCE_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) cycles_t get_cycles(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	/* Only read timer if it has been initialized */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (nios2_cs.timer.base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		return nios2_timer_read(&nios2_cs.cs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) EXPORT_SYMBOL(get_cycles);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void nios2_timer_start(struct nios2_timer *timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	u16 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	ctrl |= ALTERA_TIMER_CONTROL_START_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static void nios2_timer_stop(struct nios2_timer *timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	u16 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	ctrl |= ALTERA_TIMER_CONTROL_STOP_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static void nios2_timer_config(struct nios2_timer *timer, unsigned long period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			       bool periodic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	u16 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	/* The timer's actual period is one cycle greater than the value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	 * stored in the period register. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	 period--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	/* stop counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	timer_writew(timer, ctrl | ALTERA_TIMER_CONTROL_STOP_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		ALTERA_TIMER_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	/* write new count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	timer_writew(timer, period, ALTERA_TIMER_PERIODL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	timer_writew(timer, period >> 16, ALTERA_TIMER_PERIODH_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	ctrl |= ALTERA_TIMER_CONTROL_START_MSK | ALTERA_TIMER_CONTROL_ITO_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (periodic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		ctrl |= ALTERA_TIMER_CONTROL_CONT_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		ctrl &= ~ALTERA_TIMER_CONTROL_CONT_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int nios2_timer_set_next_event(unsigned long delta,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	struct clock_event_device *evt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	nios2_timer_config(&nios2_ced->timer, delta, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int nios2_timer_shutdown(struct clock_event_device *evt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	struct nios2_timer *timer = &nios2_ced->timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	nios2_timer_stop(timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int nios2_timer_set_periodic(struct clock_event_device *evt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	unsigned long period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	struct nios2_timer *timer = &nios2_ced->timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	period = DIV_ROUND_UP(timer->freq, HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	nios2_timer_config(timer, period, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int nios2_timer_resume(struct clock_event_device *evt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct nios2_timer *timer = &nios2_ced->timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	nios2_timer_start(timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) irqreturn_t timer_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	struct clock_event_device *evt = (struct clock_event_device *) dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	/* Clear the interrupt condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	timer_writew(&nios2_ced->timer, 0, ALTERA_TIMER_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	evt->event_handler(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static int __init nios2_timer_get_base_and_freq(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 				void __iomem **base, u32 *freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	*base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	if (!*base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		pr_crit("Unable to map reg for %pOFn\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (of_property_read_u32(np, "clock-frequency", freq)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		pr_crit("Unable to get %pOFn clock frequency\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static struct nios2_clockevent_dev nios2_ce = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	.ced = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		.name = "nios2-clkevent",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		.rating = 250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		.shift = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		.set_next_event = nios2_timer_set_next_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		.set_state_shutdown = nios2_timer_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		.set_state_periodic = nios2_timer_set_periodic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		.set_state_oneshot = nios2_timer_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		.tick_resume = nios2_timer_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static __init int nios2_clockevent_init(struct device_node *timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	void __iomem *iobase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	u32 freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	int irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	ret = nios2_timer_get_base_and_freq(timer, &iobase, &freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	irq = irq_of_parse_and_map(timer, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	if (!irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		pr_crit("Unable to parse timer irq\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	nios2_ce.timer.base = iobase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	nios2_ce.timer.freq = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	nios2_ce.ced.cpumask = cpumask_of(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	nios2_ce.ced.irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	nios2_timer_stop(&nios2_ce.timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	/* clear pending interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	timer_writew(&nios2_ce.timer, 0, ALTERA_TIMER_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	ret = request_irq(irq, timer_interrupt, IRQF_TIMER, timer->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			  &nios2_ce.ced);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		pr_crit("Unable to setup timer irq\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	clockevents_config_and_register(&nios2_ce.ced, freq, 1, ULONG_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static __init int nios2_clocksource_init(struct device_node *timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	unsigned int ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	void __iomem *iobase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	u32 freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	ret = nios2_timer_get_base_and_freq(timer, &iobase, &freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	nios2_cs.timer.base = iobase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	nios2_cs.timer.freq = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	ret = clocksource_register_hz(&nios2_cs.cs, freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	timer_writew(&nios2_cs.timer, USHRT_MAX, ALTERA_TIMER_PERIODL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	timer_writew(&nios2_cs.timer, USHRT_MAX, ALTERA_TIMER_PERIODH_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	/* interrupt disable + continuous + start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	ctrl = ALTERA_TIMER_CONTROL_CONT_MSK | ALTERA_TIMER_CONTROL_START_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	timer_writew(&nios2_cs.timer, ctrl, ALTERA_TIMER_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	/* Calibrate the delay loop directly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	lpj_fine = freq / HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)  * The first timer instance will use as a clockevent. If there are two or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)  * more instances, the second one gets used as clocksource and all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)  * others are unused.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static int __init nios2_time_init(struct device_node *timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	static int num_called;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	switch (num_called) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		ret = nios2_clockevent_init(timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		ret = nios2_clocksource_init(timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	num_called++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) void read_persistent_clock64(struct timespec64 *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	ts->tv_sec = mktime64(2007, 1, 1, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	ts->tv_nsec = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) void __init time_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	for_each_compatible_node(np, NULL,  ALTR_TIMER_COMPATIBLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	if (count < 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		panic("%d timer is found, it needs 2 timers in system\n", count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	timer_probe();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) TIMER_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);