Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2013 Altera Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * based on irq.c from m68k which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Copyright (C) 2007 Greg Ungerer <gerg@snapgear.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static u32 ienable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	struct pt_regs *oldregs = set_irq_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	irq_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	irq = irq_find_mapping(NULL, hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	generic_handle_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	irq_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	set_irq_regs(oldregs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static void chip_unmask(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	ienable |= (1 << d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	WRCTL(CTL_IENABLE, ienable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static void chip_mask(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	ienable &= ~(1 << d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	WRCTL(CTL_IENABLE, ienable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct irq_chip m_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	.name		= "NIOS2-INTC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	.irq_unmask	= chip_unmask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	.irq_mask	= chip_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int irq_map(struct irq_domain *h, unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 				irq_hw_number_t hw_irq_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	irq_set_chip_and_handler(virq, &m_irq_chip, handle_level_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static const struct irq_domain_ops irq_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	.map	= irq_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	.xlate	= irq_domain_xlate_onecell,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) void __init init_IRQ(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	struct irq_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	node = of_find_compatible_node(NULL, NULL, "altr,nios2-1.0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	if (!node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		node = of_find_compatible_node(NULL, NULL, "altr,nios2-1.1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	BUG_ON(!node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	domain = irq_domain_add_linear(node, NIOS2_CPU_NR_IRQS, &irq_ops, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	BUG_ON(!domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	irq_set_default_host(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	/* Load the initial ienable value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	ienable = RDCTL(CTL_IENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }