Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #ifndef _ASM_NIOS2_CPUINFO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define _ASM_NIOS2_CPUINFO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) struct cpuinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	/* Core CPU configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	char cpu_impl[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	u32 cpu_clock_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	bool mmu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	bool has_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	bool has_mul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	bool has_mulx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	bool has_bmx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	bool has_cdx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	/* CPU caches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	u32 icache_line_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	u32 icache_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	u32 dcache_line_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	u32 dcache_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	/* TLB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	u32 tlb_pid_num_bits;	/* number of bits used for the PID in TLBMISC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	u32 tlb_num_ways;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	u32 tlb_num_ways_log2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	u32 tlb_num_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	u32 tlb_num_lines;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	u32 tlb_ptr_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	/* Addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	u32 reset_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	u32 exception_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	u32 fast_tlb_miss_exc_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern struct cpuinfo cpuinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) extern void setup_cpuinfo(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif /* _ASM_NIOS2_CPUINFO_H */