Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2004 Microtronix Datacom Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef _ASM_NIOS2_CACHE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define _ASM_NIOS2_CACHE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define NIOS2_DCACHE_SIZE	CONFIG_NIOS2_DCACHE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define NIOS2_ICACHE_SIZE	CONFIG_NIOS2_ICACHE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define NIOS2_DCACHE_LINE_SIZE	CONFIG_NIOS2_DCACHE_LINE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define NIOS2_ICACHE_LINE_SHIFT	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define NIOS2_ICACHE_LINE_SIZE	(1 << NIOS2_ICACHE_LINE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* bytes per L1 cache line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define L1_CACHE_SHIFT		NIOS2_ICACHE_LINE_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define L1_CACHE_BYTES		NIOS2_ICACHE_LINE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ARCH_DMA_MINALIGN	L1_CACHE_BYTES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define __cacheline_aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ____cacheline_aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #endif