^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2009 Thomas Chou <thomas@wytron.com.tw>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Based on arch/nios2/kernel/head.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This code can be loaded anywhere, eg FLASH ROM as reset vector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * as long as output does not overlap it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .set noat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ENTRY(_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) wrctl status, r0 /* disable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* invalidate all instruction cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) movia r1, NIOS2_ICACHE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) movui r2, NIOS2_ICACHE_LINE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 1: initi r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) sub r1, r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) bgt r1, r0, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* invalidate all data cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) movia r1, NIOS2_DCACHE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) movui r2, NIOS2_DCACHE_LINE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 1: initd 0(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) sub r1, r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) bgt r1, r0, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) nextpc r1 /* Find out where we are */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) chkadr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) movia r2, chkadr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) beq r1, r2, finish_move /* We are running in correct address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* move code, r1: src, r2: dest, r3: last dest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) addi r1, r1, (_start - chkadr) /* Source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) movia r2, _start /* Destination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) movia r3, __bss_start /* End of copy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 1: ldw r8, 0(r1) /* load a word from [r1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) stw r8, 0(r2) /* stort a word to dest [r2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) addi r1, r1, 4 /* inc the src addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) addi r2, r2, 4 /* inc the dest addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) blt r2, r3, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* flush the data cache after moving */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) movia r1, NIOS2_DCACHE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) movui r2, NIOS2_DCACHE_LINE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 1: flushd 0(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) sub r1, r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) bgt r1, r0, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) movia r1, finish_move
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) jmp r1 /* jmp to linked address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) finish_move:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* zero out the .bss segment (uninitialized common data) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) movia r2, __bss_start /* presume nothing is between */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) movia r1, _end /* the .bss and _end. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 1: stb r0, 0(r2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) addi r2, r2, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) bne r1, r2, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * set up the stack pointer, some where higher than _end.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * The stack space must be greater than 32K for decompress.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) movia sp, 0x10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) add sp, sp, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* save args passed from u-boot, maybe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) addi sp, sp, -16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) stw r4, 0(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) stw r5, 4(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) stw r6, 8(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) stw r7, 12(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* decompress the kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) call decompress_kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* pass saved args to kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ldw r4, 0(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ldw r5, 4(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ldw r6, 8(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ldw r7, 12(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* flush all data cache after decompressing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) movia r1, NIOS2_DCACHE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) movui r2, NIOS2_DCACHE_LINE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 1: flushd 0(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) sub r1, r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) bgt r1, r0, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* flush all instruction cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) movia r1, NIOS2_ICACHE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) movui r2, NIOS2_ICACHE_LINE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) 1: flushi r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) sub r1, r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) bgt r1, r0, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) flushp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* jump to start real kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) movia r1, (CONFIG_NIOS2_MEM_BASE | CONFIG_NIOS2_KERNEL_REGION_BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) jmp r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .balign 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) fake_headers_as_bzImage:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .short 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .ascii "HdrS"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .short 0x0202
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .short 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .short 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .byte 0x00, 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .short 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .byte 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .byte 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .byte 0x00, 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .long 0
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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