Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) // Copyright (C) 2005-2018 Andes Technology Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/sched/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <asm/user.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <asm/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <asm/fpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) const struct fpu_struct init_fpuregs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	.fd_regs = {[0 ... 31] = sNAN64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	.fpcsr = FPCSR_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #if IS_ENABLED(CONFIG_SUPPORT_DENORMAL_ARITHMETIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	.UDF_IEX_trap = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) void save_fpu(struct task_struct *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	unsigned int fpcfg, fpcsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	enable_fpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	fpcfg = ((__nds32__fmfcfg() & FPCFG_mskFREG) >> FPCFG_offFREG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	switch (fpcfg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	case SP32_DP32_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		asm volatile ("fsdi $fd31, [%0+0xf8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 			      "fsdi $fd30, [%0+0xf0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 			      "fsdi $fd29, [%0+0xe8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 			      "fsdi $fd28, [%0+0xe0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 			      "fsdi $fd27, [%0+0xd8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 			      "fsdi $fd26, [%0+0xd0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 			      "fsdi $fd25, [%0+0xc8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 			      "fsdi $fd24, [%0+0xc0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 			      "fsdi $fd23, [%0+0xb8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 			      "fsdi $fd22, [%0+0xb0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 			      "fsdi $fd21, [%0+0xa8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 			      "fsdi $fd20, [%0+0xa0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 			      "fsdi $fd19, [%0+0x98]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 			      "fsdi $fd18, [%0+0x90]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 			      "fsdi $fd17, [%0+0x88]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 			      "fsdi $fd16, [%0+0x80]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 			      :	/* no output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 			      : "r" (&tsk->thread.fpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			      : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	case SP32_DP16_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		asm volatile ("fsdi $fd15, [%0+0x78]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 			      "fsdi $fd14, [%0+0x70]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			      "fsdi $fd13, [%0+0x68]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 			      "fsdi $fd12, [%0+0x60]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 			      "fsdi $fd11, [%0+0x58]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 			      "fsdi $fd10, [%0+0x50]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 			      "fsdi $fd9,  [%0+0x48]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			      "fsdi $fd8,  [%0+0x40]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			      :	/* no output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			      : "r" (&tsk->thread.fpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 			      : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	case SP16_DP8_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		asm volatile ("fsdi $fd7,  [%0+0x38]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			      "fsdi $fd6,  [%0+0x30]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			      "fsdi $fd5,  [%0+0x28]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 			      "fsdi $fd4,  [%0+0x20]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 			      :	/* no output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			      : "r" (&tsk->thread.fpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 			      : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	case SP8_DP4_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		asm volatile ("fsdi $fd3,  [%1+0x18]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			      "fsdi $fd2,  [%1+0x10]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			      "fsdi $fd1,  [%1+0x8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			      "fsdi $fd0,  [%1+0x0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			      "fmfcsr	%0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 			      "swi  %0, [%1+0x100]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			      : "=&r" (fpcsr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			      : "r"(&tsk->thread.fpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			      : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	disable_fpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) void load_fpu(const struct fpu_struct *fpregs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	unsigned int fpcfg, fpcsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	enable_fpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	fpcfg = ((__nds32__fmfcfg() & FPCFG_mskFREG) >> FPCFG_offFREG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	switch (fpcfg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	case SP32_DP32_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		asm volatile ("fldi $fd31, [%0+0xf8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 			      "fldi $fd30, [%0+0xf0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			      "fldi $fd29, [%0+0xe8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			      "fldi $fd28, [%0+0xe0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			      "fldi $fd27, [%0+0xd8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			      "fldi $fd26, [%0+0xd0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			      "fldi $fd25, [%0+0xc8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			      "fldi $fd24, [%0+0xc0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			      "fldi $fd23, [%0+0xb8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			      "fldi $fd22, [%0+0xb0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			      "fldi $fd21, [%0+0xa8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			      "fldi $fd20, [%0+0xa0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			      "fldi $fd19, [%0+0x98]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			      "fldi $fd18, [%0+0x90]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			      "fldi $fd17, [%0+0x88]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			      "fldi $fd16, [%0+0x80]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			      :	/* no output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			      : "r" (fpregs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	case SP32_DP16_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		asm volatile ("fldi $fd15, [%0+0x78]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			      "fldi $fd14, [%0+0x70]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			      "fldi $fd13, [%0+0x68]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			      "fldi $fd12, [%0+0x60]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			      "fldi $fd11, [%0+0x58]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			      "fldi $fd10, [%0+0x50]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			      "fldi $fd9,  [%0+0x48]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			      "fldi $fd8,  [%0+0x40]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			      :	/* no output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			      : "r" (fpregs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	case SP16_DP8_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		asm volatile ("fldi $fd7,  [%0+0x38]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			      "fldi $fd6,  [%0+0x30]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			      "fldi $fd5,  [%0+0x28]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			      "fldi $fd4,  [%0+0x20]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			      :	/* no output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			      : "r" (fpregs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	case SP8_DP4_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		asm volatile ("fldi $fd3,  [%1+0x18]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			      "fldi $fd2,  [%1+0x10]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			      "fldi $fd1,  [%1+0x8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			      "fldi $fd0,  [%1+0x0]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			      "lwi  %0, [%1+0x100]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			      "fmtcsr	%0\n\t":"=&r" (fpcsr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			      : "r"(fpregs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	disable_fpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) void store_fpu_for_suspend(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #ifdef CONFIG_LAZY_FPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if (last_task_used_math != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		save_fpu(last_task_used_math);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	last_task_used_math = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (!used_math())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	unlazy_fpu(current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	clear_fpu(task_pt_regs(current));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) inline void do_fpu_context_switch(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	/* Enable to use FPU. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (!user_mode(regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		pr_err("BUG: FPU is used in kernel mode.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	enable_ptreg_fpu(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #ifdef CONFIG_LAZY_FPU	//Lazy FPU is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	if (last_task_used_math == current)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	if (last_task_used_math != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		/* Other processes fpu state, save away */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		save_fpu(last_task_used_math);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	last_task_used_math = current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	if (used_math()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		load_fpu(&current->thread.fpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		/* First time FPU user.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		load_fpu(&init_fpuregs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #if IS_ENABLED(CONFIG_SUPPORT_DENORMAL_ARITHMETIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		current->thread.fpu.UDF_IEX_trap = init_fpuregs.UDF_IEX_trap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		set_used_math();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) inline void fill_sigfpe_signo(unsigned int fpcsr, int *signo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if (fpcsr & FPCSR_mskOVFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		*signo = FPE_FLTOVF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #ifndef CONFIG_SUPPORT_DENORMAL_ARITHMETIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	else if (fpcsr & FPCSR_mskUDFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		*signo = FPE_FLTUND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	else if (fpcsr & FPCSR_mskIVOT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		*signo = FPE_FLTINV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	else if (fpcsr & FPCSR_mskDBZT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		*signo = FPE_FLTDIV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	else if (fpcsr & FPCSR_mskIEXT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		*signo = FPE_FLTRES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) inline void handle_fpu_exception(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	unsigned int fpcsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	int si_code = 0, si_signo = SIGFPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #if IS_ENABLED(CONFIG_SUPPORT_DENORMAL_ARITHMETIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	unsigned long redo_except = FPCSR_mskDNIT|FPCSR_mskUDFT|FPCSR_mskIEXT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	unsigned long redo_except = FPCSR_mskDNIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	lose_fpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	fpcsr = current->thread.fpu.fpcsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (fpcsr & redo_except) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		si_signo = do_fpuemu(regs, &current->thread.fpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		fpcsr = current->thread.fpu.fpcsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		if (!si_signo) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			current->thread.fpu.fpcsr &= ~(redo_except);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	} else if (fpcsr & FPCSR_mskRIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		if (!user_mode(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			do_exit(SIGILL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		si_signo = SIGILL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	switch (si_signo) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	case SIGFPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		fill_sigfpe_signo(fpcsr, &si_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	case SIGILL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		show_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		si_code = ILL_COPROC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	case SIGBUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		si_code = BUS_ADRERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	force_sig_fault(si_signo, si_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			(void __user *)instruction_pointer(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	own_fpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) bool do_fpu_exception(unsigned int subtype, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	int done = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	/* Coprocessor disabled exception */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	if (subtype == FPU_DISABLE_EXCEPTION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		do_fpu_context_switch(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	/* Coprocessor exception such as underflow and overflow */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	else if (subtype == FPU_EXCEPTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		handle_fpu_exception(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		done = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	return done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }