Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (C) 2002-2006  Yoichi Yuasa <yuasa@linux-mips.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define E55_ISA_IO_BASE		0x1400c000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define E55_ISA_IO_SIZE		0x03ff4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define E55_ISA_IO_START	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define E55_ISA_IO_END		(E55_ISA_IO_SIZE - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define E55_IO_PORT_BASE	KSEG1ADDR(E55_ISA_IO_BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static int __init casio_e55_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	set_io_port_base(E55_IO_PORT_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	ioport_resource.start = E55_ISA_IO_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	ioport_resource.end = E55_ISA_IO_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) arch_initcall(casio_e55_setup);