Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Setup pointers to hardware-dependent routines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 2006,2007 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/eisa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/screen_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #ifdef CONFIG_FW_ARC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/fw/arc/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/sgialib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #ifdef CONFIG_FW_SNIPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <asm/mipsprom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <asm/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <asm/sni.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) unsigned int sni_brd_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) EXPORT_SYMBOL(sni_brd_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) extern void sni_machine_restart(char *command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) extern void sni_machine_power_off(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static void __init sni_display_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) && defined(CONFIG_FW_ARC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct screen_info *si = &screen_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	DISPLAY_STATUS *di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	di = ArcGetDisplayStatus(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	if (di) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		si->orig_x		= di->CursorXPosition;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		si->orig_y		= di->CursorYPosition;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		si->orig_video_cols	= di->CursorMaxXPosition;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		si->orig_video_lines	= di->CursorMaxYPosition;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		si->orig_video_isVGA	= VIDEO_TYPE_VGAC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		si->orig_video_points	= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static void __init sni_console_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #ifndef CONFIG_FW_ARC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	char *ctype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	char *cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	char *baud;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	int port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	static char options[8] __initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	cdev = prom_getenv("console_dev");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	if (strncmp(cdev, "tty", 3) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		ctype = prom_getenv("console");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		switch (*ctype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		case 'l':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			port = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			baud = prom_getenv("lbaud");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		case 'r':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 			port = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			baud = prom_getenv("rbaud");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		if (baud)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			strcpy(options, baud);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		if (strncmp(cdev, "tty552", 6) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			add_preferred_console("ttyS", port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 					      baud ? options : NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 			add_preferred_console("ttySC", port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 					      baud ? options : NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static void __init sni_idprom_dump(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	int	i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	pr_debug("SNI IDProm dump:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	for (i = 0; i < 256; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		if (i%16 == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			pr_debug("%04x ", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		printk("%02x ", *(unsigned char *) (SNI_IDPROM_BASE + i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		if (i % 16 == 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void __init plat_mem_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	int cputype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	set_io_port_base(SNI_PORT_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) //	ioport_resource.end = sni_io_resource.end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	 * Setup (E)ISA I/O memory access stuff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #ifdef CONFIG_EISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	EISA_bus = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	sni_brd_type = *(unsigned char *)SNI_IDPROM_BRDTYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	cputype = *(unsigned char *)SNI_IDPROM_CPUTYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	switch (sni_brd_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	case SNI_BRD_TOWER_OASIC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		switch (cputype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		case SNI_CPU_M8030:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			system_type = "RM400-330";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		case SNI_CPU_M8031:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			system_type = "RM400-430";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		case SNI_CPU_M8037:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			system_type = "RM400-530";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		case SNI_CPU_M8034:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			system_type = "RM400-730";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			system_type = "RM400-xxx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	case SNI_BRD_MINITOWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		switch (cputype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		case SNI_CPU_M8021:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		case SNI_CPU_M8043:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			system_type = "RM400-120";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		case SNI_CPU_M8040:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			system_type = "RM400-220";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		case SNI_CPU_M8053:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			system_type = "RM400-225";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		case SNI_CPU_M8050:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			system_type = "RM400-420";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			system_type = "RM400-xxx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	case SNI_BRD_PCI_TOWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		system_type = "RM400-Cxx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	case SNI_BRD_RM200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		system_type = "RM200-xxx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	case SNI_BRD_PCI_MTOWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		system_type = "RM300-Cxx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	case SNI_BRD_PCI_DESKTOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		switch (read_c0_prid() & PRID_IMP_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		case PRID_IMP_R4600:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		case PRID_IMP_R4700:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			system_type = "RM200-C20";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		case PRID_IMP_R5000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 			system_type = "RM200-C40";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 			system_type = "RM200-Cxx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	case SNI_BRD_PCI_TOWER_CPLUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		system_type = "RM400-Exx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	case SNI_BRD_PCI_MTOWER_CPLUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		system_type = "RM300-Exx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type, system_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	sni_idprom_dump();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	switch (sni_brd_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	case SNI_BRD_10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	case SNI_BRD_10NEW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	case SNI_BRD_TOWER_OASIC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	case SNI_BRD_MINITOWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		sni_a20r_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	case SNI_BRD_PCI_TOWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	case SNI_BRD_PCI_TOWER_CPLUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		sni_pcit_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	case SNI_BRD_RM200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		sni_rm200_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	case SNI_BRD_PCI_MTOWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	case SNI_BRD_PCI_DESKTOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	case SNI_BRD_PCI_MTOWER_CPLUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		sni_pcimt_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	_machine_restart = sni_machine_restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	pm_power_off = sni_machine_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	sni_display_setup();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	sni_console_setup();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #include <video/vga.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #include <video/cirrus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void quirk_cirrus_ram_size(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	u16 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	 * firmware doesn't set the ram size correct, so we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	 * need to do it here, otherwise we get screen corruption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	 * on older Cirrus chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	pci_read_config_word(dev, PCI_COMMAND, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		== (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		vga_wseq(NULL, CL_SEQR6, 0x12); /* unlock all extension registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		vga_wseq(NULL, CL_SEQRF, 0x18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5434_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			quirk_cirrus_ram_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5436,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 			quirk_cirrus_ram_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			quirk_cirrus_ram_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #endif