^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) config SIBYTE_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) select CEVT_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) select CSRC_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) select IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) select SIBYTE_ENABLE_LDT_IF_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) select SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) select SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) select SYS_SUPPORTS_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) config SIBYTE_BCM1120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) select CEVT_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) select CSRC_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) select IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) select SIBYTE_BCM112X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) select SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) select SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) config SIBYTE_BCM1125
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) select CEVT_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) select CSRC_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) select IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) select SIBYTE_BCM112X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) select SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) select SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) config SIBYTE_BCM1125H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) select CEVT_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) select CSRC_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) select IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) select SIBYTE_BCM112X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) select SIBYTE_ENABLE_LDT_IF_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) select SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) select SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) config SIBYTE_BCM112X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) select CEVT_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) select CSRC_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) select IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) select SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) select SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) config SIBYTE_BCM1x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) select CEVT_BCM1480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) select CSRC_BCM1480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) select IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) select SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) select SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) select SYS_SUPPORTS_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) config SIBYTE_BCM1x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) select CEVT_BCM1480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) select CSRC_BCM1480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) select IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) select SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) select SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) select SYS_SUPPORTS_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) config SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) select IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) select SWAP_IO_SPACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) select SYS_SUPPORTS_32BIT_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) select SYS_SUPPORTS_64BIT_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) select FW_CFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) select SYS_HAS_EARLY_PRINTK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) prompt "SiByte SOC Stepping"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) depends on SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) config CPU_SB1_PASS_2_1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) bool "1250 An"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) depends on SIBYTE_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) select CPU_SB1_PASS_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) Also called BCM1250 Pass 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) config CPU_SB1_PASS_2_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) bool "1250 Bn"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) depends on SIBYTE_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) select CPU_HAS_PREFETCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) Also called BCM1250 Pass 2.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) config CPU_SB1_PASS_4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) bool "1250 Cn"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) depends on SIBYTE_SB1250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) select CPU_HAS_PREFETCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) Also called BCM1250 Pass 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) config CPU_SB1_PASS_2_112x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) bool "112x Hybrid"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) depends on SIBYTE_BCM112X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) select CPU_SB1_PASS_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) config CPU_SB1_PASS_3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) bool "112x An"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) depends on SIBYTE_BCM112X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) select CPU_HAS_PREFETCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) config CPU_SB1_PASS_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) config SIBYTE_HAS_LDT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) config SIBYTE_ENABLE_LDT_IF_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) select SIBYTE_HAS_LDT if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) config SB1_CEX_ALWAYS_FATAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) bool "All cache exceptions considered fatal (no recovery attempted)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) depends on SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) config SB1_CERR_STALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) bool "Stall (rather than panic) on fatal cache error"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) depends on SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) config SIBYTE_CFE_CONSOLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) bool "Use firmware console"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) depends on SIBYTE_SB1xxx_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) Use the CFE API's console write routines during boot. Other console
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) options (VT console, sb1250 duart console, etc.) should not be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) configured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) config SIBYTE_BUS_WATCHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) bool "Support for Bus Watcher statistics"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) depends on SIBYTE_SB1xxx_SOC && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) (SIBYTE_BCM112X || SIBYTE_SB1250 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) SIBYTE_BCM1x55 || SIBYTE_BCM1x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) Handle and keep statistics on the bus error interrupts (COR_ECC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) BAD_ECC, IO_BUS).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) config SIBYTE_BW_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) bool "Capture bus trace before bus error"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) depends on SIBYTE_BUS_WATCHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) Run a continuous bus trace, dumping the raw data as soon as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) a ZBbus error is detected. Cannot work if ZBbus profiling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) is turned on, and also will interfere with JTAG-based trace
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) buffer activity. Raw buffer data is dumped to console, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) must be processed off-line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) config SIBYTE_TBPROF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) tristate "Support for ZBbus profiling"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) depends on SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) config SIBYTE_HAS_ZBUS_PROFILING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) bool
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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