^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/rtc/ds1685.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/ip32/mace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/ip32/ip32_ints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) extern void ip32_prepare_poweroff(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define MACEISA_SERIAL1_OFFS offsetof(struct sgi_mace, isa.serial1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define MACEISA_SERIAL2_OFFS offsetof(struct sgi_mace, isa.serial2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MACE_PORT(offset,_irq) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .mapbase = MACE_BASE + offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .irq = _irq, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .uartclk = 1843200, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .iotype = UPIO_MEM, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .flags = UPF_SKIP_TEST|UPF_IOREMAP, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .regshift = 8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static struct plat_serial8250_port uart8250_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MACE_PORT(MACEISA_SERIAL1_OFFS, MACEISA_SERIAL1_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MACE_PORT(MACEISA_SERIAL2_OFFS, MACEISA_SERIAL2_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static struct platform_device uart8250_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .name = "serial8250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .id = PLAT8250_DEV_PLATFORM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .platform_data = uart8250_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int __init uart8250_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return platform_device_register(&uart8250_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) device_initcall(uart8250_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static __init int meth_devinit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct platform_device *pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) pd = platform_device_alloc("meth", -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (!pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ret = platform_device_add(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) platform_device_put(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) device_initcall(meth_devinit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static __init int sgio2audio_devinit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct platform_device *pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) pd = platform_device_alloc("sgio2audio", -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (!pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ret = platform_device_add(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) platform_device_put(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) device_initcall(sgio2audio_devinit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static __init int sgio2btns_devinit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return IS_ERR(platform_device_register_simple("sgibtns", -1, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) device_initcall(sgio2btns_devinit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define MACE_RTC_RES_START (MACE_BASE + offsetof(struct sgi_mace, isa.rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define MACE_RTC_RES_END (MACE_RTC_RES_START + 32767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static struct resource ip32_rtc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .start = MACEISA_RTC_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .end = MACEISA_RTC_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .flags = IORESOURCE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .start = MACE_RTC_RES_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .end = MACE_RTC_RES_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* RTC registers on IP32 are each padded by 256 bytes (0x100). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static struct ds1685_rtc_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ip32_rtc_platform_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .regstep = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .bcd_mode = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .no_irq = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .uie_unsupported = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .access_type = ds1685_reg_direct,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .plat_prepare_poweroff = ip32_prepare_poweroff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct platform_device ip32_rtc_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .name = "rtc-ds1685",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .platform_data = ip32_rtc_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .num_resources = ARRAY_SIZE(ip32_rtc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .resource = ip32_rtc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static __init int sgio2_rtc_devinit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return platform_device_register(&ip32_rtc_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) device_initcall(sgio2_rtc_devinit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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