Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #ifndef __IP30_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) #define __IP30_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Power Switch is wired via BaseIO BRIDGE slot #6.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * ACFail is wired via BaseIO BRIDGE slot #7.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define IP30_POWER_IRQ		HEART_L2_INT_POWER_BTN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define IP30_HEART_L0_IRQ	(MIPS_CPU_IRQ_BASE + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define IP30_HEART_L1_IRQ	(MIPS_CPU_IRQ_BASE + 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define IP30_HEART_L2_IRQ	(MIPS_CPU_IRQ_BASE + 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define IP30_HEART_TIMER_IRQ	(MIPS_CPU_IRQ_BASE + 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define IP30_HEART_ERR_IRQ	(MIPS_CPU_IRQ_BASE + 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern void __init ip30_install_ipi(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) extern struct plat_smp_ops ip30_smp_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) extern void __init ip30_per_cpu_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #endif /* __IP30_COMMON_H */