Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *	       found on INDY and Indigo2 workstations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *		      - Indigo2 changes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *		      - Interrupt handling fixes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/kernel_stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/ftrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/irq_cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/sgi/hpc3.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/sgi/ip22.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) /* So far nothing hangs here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #undef USE_LIO3_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) struct sgint_regs *sgint;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static char lc0msk_to_irqnr[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static char lc1msk_to_irqnr[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static char lc2msk_to_irqnr[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static char lc3msk_to_irqnr[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) extern int ip22_eisa_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static void enable_local0_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	/* don't allow mappable interrupt to be enabled from setup_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	 * we have our own way to do so */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	if (d->irq != SGI_MAP_0_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		sgint->imask0 |= (1 << (d->irq - SGINT_LOCAL0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static void disable_local0_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	sgint->imask0 &= ~(1 << (d->irq - SGINT_LOCAL0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static struct irq_chip ip22_local0_irq_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	.name		= "IP22 local 0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.irq_mask	= disable_local0_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.irq_unmask	= enable_local0_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static void enable_local1_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	/* don't allow mappable interrupt to be enabled from setup_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	 * we have our own way to do so */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	if (d->irq != SGI_MAP_1_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		sgint->imask1 |= (1 << (d->irq - SGINT_LOCAL1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static void disable_local1_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	sgint->imask1 &= ~(1 << (d->irq - SGINT_LOCAL1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static struct irq_chip ip22_local1_irq_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.name		= "IP22 local 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	.irq_mask	= disable_local1_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	.irq_unmask	= enable_local1_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static void enable_local2_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	sgint->cmeimask0 |= (1 << (d->irq - SGINT_LOCAL2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static void disable_local2_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	sgint->cmeimask0 &= ~(1 << (d->irq - SGINT_LOCAL2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if (!sgint->cmeimask0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static struct irq_chip ip22_local2_irq_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	.name		= "IP22 local 2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	.irq_mask	= disable_local2_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	.irq_unmask	= enable_local2_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) static void enable_local3_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	sgint->cmeimask1 |= (1 << (d->irq - SGINT_LOCAL3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static void disable_local3_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	sgint->cmeimask1 &= ~(1 << (d->irq - SGINT_LOCAL3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (!sgint->cmeimask1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct irq_chip ip22_local3_irq_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.name		= "IP22 local 3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	.irq_mask	= disable_local3_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	.irq_unmask	= enable_local3_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void indy_local0_irqdispatch(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	u8 mask = sgint->istat0 & sgint->imask0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	u8 mask2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (mask & SGINT_ISTAT0_LIO2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		mask2 = sgint->vmeistat & sgint->cmeimask0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		irq = lc2msk_to_irqnr[mask2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		irq = lc0msk_to_irqnr[mask];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	 * workaround for INT2 bug; if irq == 0, INT2 has seen a fifo full
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	 * irq, but failed to latch it into status register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		do_IRQ(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		do_IRQ(SGINT_LOCAL0 + 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static void indy_local1_irqdispatch(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	u8 mask = sgint->istat1 & sgint->imask1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	u8 mask2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	if (mask & SGINT_ISTAT1_LIO3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		mask2 = sgint->vmeistat & sgint->cmeimask1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		irq = lc3msk_to_irqnr[mask2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		irq = lc1msk_to_irqnr[mask];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	/* if irq == 0, then the interrupt has already been cleared */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if (irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		do_IRQ(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) extern void ip22_be_interrupt(int irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static void __irq_entry indy_buserror_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	int irq = SGI_BUSERR_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	irq_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	kstat_incr_irq_this_cpu(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	ip22_be_interrupt(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	irq_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #ifdef USE_LIO3_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define SGI_INTERRUPTS	SGINT_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define SGI_INTERRUPTS	SGINT_LOCAL3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) extern void indy_8254timer_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)  * IRQs on the INDY look basically (barring software IRQs which we don't use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  * at all) like:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)  *	MIPS IRQ	Source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)  *	--------	------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)  *	       0	Software (ignored)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)  *	       1	Software (ignored)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)  *	       2	Local IRQ level zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)  *	       3	Local IRQ level one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)  *	       4	8254 Timer zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)  *	       5	8254 Timer one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)  *	       6	Bus Error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)  *	       7	R4k timer (what we use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)  * We handle the IRQ according to _our_ priority which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)  * Highest ----	    R4k Timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)  *		    Local IRQ zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)  *		    Local IRQ one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)  *		    Bus Error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)  *		    8254 Timer zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)  * Lowest  ----	    8254 Timer one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)  * then we just return, if multiple IRQs are pending then we will just take
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)  * another exception, big deal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) asmlinkage void plat_irq_dispatch(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	unsigned int pending = read_c0_status() & read_c0_cause();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	 * First we check for r4k counter/timer IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (pending & CAUSEF_IP7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		do_IRQ(SGI_TIMER_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	else if (pending & CAUSEF_IP2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		indy_local0_irqdispatch();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	else if (pending & CAUSEF_IP3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		indy_local1_irqdispatch();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	else if (pending & CAUSEF_IP6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		indy_buserror_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		indy_8254timer_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) void __init arch_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	/* Init local mask --> irq tables. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	for (i = 0; i < 256; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		if (i & 0x80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		} else if (i & 0x40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		} else if (i & 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		} else if (i & 0x10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		} else if (i & 0x08) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		} else if (i & 0x04) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		} else if (i & 0x02) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		} else if (i & 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			lc0msk_to_irqnr[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			lc1msk_to_irqnr[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			lc2msk_to_irqnr[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			lc3msk_to_irqnr[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	/* Mask out all interrupts. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	sgint->imask0 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	sgint->imask1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	sgint->cmeimask0 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	sgint->cmeimask1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	/* init CPU irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	mips_cpu_irq_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		struct irq_chip *handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		if (i < SGINT_LOCAL1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 			handler		= &ip22_local0_irq_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		else if (i < SGINT_LOCAL2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 			handler		= &ip22_local1_irq_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		else if (i < SGINT_LOCAL3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 			handler		= &ip22_local2_irq_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			handler		= &ip22_local3_irq_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		irq_set_chip_and_handler(i, handler, handle_level_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	/* vector handler. this register the IRQ as non-sharable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (request_irq(SGI_LOCAL_0_IRQ, no_action, IRQF_NO_THREAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			"local0 cascade", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		pr_err("Failed to register local0 cascade interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	if (request_irq(SGI_LOCAL_1_IRQ, no_action, IRQF_NO_THREAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			"local1 cascade", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		pr_err("Failed to register local1 cascade interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	if (request_irq(SGI_BUSERR_IRQ, no_action, IRQF_NO_THREAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			"Bus Error", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		pr_err("Failed to register Bus Error interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	/* cascade in cascade. i love Indy ;-) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	if (request_irq(SGI_MAP_0_IRQ, no_action, IRQF_NO_THREAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			"mapable0 cascade", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		pr_err("Failed to register mapable0 cascade interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #ifdef USE_LIO3_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	if (request_irq(SGI_MAP_1_IRQ, no_action, IRQF_NO_THREAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 			"mapable1 cascade", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		pr_err("Failed to register mapable1 cascade interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #ifdef CONFIG_EISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	if (ip22_is_fullhouse())	/* Only Indigo-2 has EISA stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		ip22_eisa_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }