Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Carsten Langgaard, carstenl@mips.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *  Setting up the clock on the MIPS boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel_stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mc146818rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/timex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach-rc32434/rc32434.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) extern unsigned int idt_cpu_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * Figure out the r4k offset, the amount to increment the compare
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * register for each time tick. There is no RTC available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  * The RC32434 counts at half the CPU *core* speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static unsigned long __init cal_r4koff(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	mips_hpt_frequency = idt_cpu_freq * IDT_CLOCK_MULT / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	return mips_hpt_frequency / HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) void __init plat_time_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	unsigned int est_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	unsigned long flags, r4k_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	printk(KERN_INFO "calculating r4koff... ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	r4k_offset = cal_r4koff();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	est_freq = 2 * r4k_offset * HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	est_freq += 5000;	/* round */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	est_freq -= est_freq % 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	       (est_freq % 1000000) * 100 / 1000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }