Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  RouterBoard 500 specific prom routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 2003, Peter Sadik <peter.sadik@idt.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *  Copyright (C) 2005-2006, P.Christeas <p_christ@hol.gr>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *  Copyright (C) 2007, Gabor Juhos <juhosg@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *			Felix Fietkau <nbd@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *			Florian Fainelli <florian@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/mach-rc32434/ddr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/mach-rc32434/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) unsigned int idt_cpu_freq = 132000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) EXPORT_SYMBOL(idt_cpu_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static struct resource ddr_reg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		.name = "ddr-reg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		.start = DDR0_PHYS_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		.end = DDR0_PHYS_ADDR + sizeof(struct ddr_ram),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		.flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) void __init prom_free_prom_memory(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	/* No prom memory to free */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static inline int match_tag(char *arg, const char *tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	return strncmp(arg, tag, strlen(tag)) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static inline unsigned long tag2ul(char *arg, const char *tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	char *num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	num = arg + strlen(tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	return simple_strtoul(num, 0, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) void __init prom_setup_cmdline(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	static char cmd_line[COMMAND_LINE_SIZE] __initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	char *cp, *board;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	int prom_argc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	char **prom_argv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	prom_argc = fw_arg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	prom_argv = (char **) fw_arg1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	cp = cmd_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		/* Note: it is common that parameters start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		 * at argv[1] and not argv[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		 * however, our elf loader starts at [0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	for (i = 0; i < prom_argc; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		if (match_tag(prom_argv[i], FREQ_TAG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			idt_cpu_freq = tag2ul(prom_argv[i], FREQ_TAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #ifdef IGNORE_CMDLINE_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		/* parses out the "mem=xx" arg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		if (match_tag(prom_argv[i], MEM_TAG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		if (i > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			*(cp++) = ' ';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		if (match_tag(prom_argv[i], BOARD_TAG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 			board = prom_argv[i] + strlen(BOARD_TAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 			if (match_tag(board, BOARD_RB532A))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 				mips_machtype = MACH_MIKROTIK_RB532A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 				mips_machtype = MACH_MIKROTIK_RB532;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		strcpy(cp, prom_argv[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		cp += strlen(prom_argv[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	*(cp++) = ' ';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	i = strlen(arcs_cmdline);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (i > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		*(cp++) = ' ';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		strcpy(cp, arcs_cmdline);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		cp += strlen(arcs_cmdline);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	cmd_line[COMMAND_LINE_SIZE - 1] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	strcpy(arcs_cmdline, cmd_line);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) void __init prom_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct ddr_ram __iomem *ddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	phys_addr_t memsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	phys_addr_t ddrbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	ddr = ioremap(ddr_reg[0].start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			ddr_reg[0].end - ddr_reg[0].start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	if (!ddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		printk(KERN_ERR "Unable to remap DDR register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	ddrbase = (phys_addr_t)&ddr->ddrbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	memsize = (phys_addr_t)&ddr->ddrmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	memsize = 0 - memsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	prom_setup_cmdline();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	/* give all RAM to boot allocator,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	 * except for the first 0x400 and the last 0x200 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	memblock_add(ddrbase + 0x400, memsize - 0x600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }