^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2013 John Crispin <john@phrozen.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/addrspace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) __iomem void *rt_sysc_membase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) __iomem void *rt_memc_membase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) EXPORT_SYMBOL_GPL(rt_sysc_membase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) __iomem void *plat_of_remap_node(const char *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct resource res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) np = of_find_compatible_node(NULL, NULL, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) panic("Failed to find %s node", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (of_address_to_resource(np, 0, &res))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) panic("Failed to get resource for %s", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (!request_mem_region(res.start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) resource_size(&res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) res.name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) panic("Failed to request resources for %s", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return ioremap(res.start, resource_size(&res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) void __init device_tree_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unflatten_and_copy_device_tree();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static int memory_dtb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int __init early_init_dt_find_memory(unsigned long node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) const char *uname, int depth, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (depth == 1 && !strcmp(uname, "memory@0"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) memory_dtb = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) void __init plat_mem_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void *dtb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) set_io_port_base(KSEG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * Load the builtin devicetree. This causes the chosen node to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * parsed resulting in our memory appearing. fw_passed_dtb is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * by CONFIG_MIPS_APPENDED_RAW_DTB as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (fw_passed_dtb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dtb = (void *)fw_passed_dtb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) else if (__dtb_start != __dtb_end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) dtb = (void *)__dtb_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) __dt_setup_arch(dtb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) of_scan_flat_dt(early_init_dt_find_memory, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (memory_dtb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) of_scan_flat_dt(early_init_dt_scan_memory, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) else if (soc_info.mem_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) memblock_add(soc_info.mem_base, soc_info.mem_size * SZ_1M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) detect_memory_region(soc_info.mem_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) soc_info.mem_size_min * SZ_1M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) soc_info.mem_size_max * SZ_1M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static int __init plat_of_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) __dt_register_buses(soc_info.compatible, "palmbus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* make sure that the reset controller is setup early */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) ralink_rst_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) arch_initcall(plat_of_setup);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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