Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Joshua Henderson <joshua.henderson@microchip.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <asm/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <asm/mach-pic32/pic32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define PIC32_RSWRST		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static void pic32_halt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		__asm__(".set push;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 			".set arch=r4000;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 			"wait;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 			".set pop;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static void pic32_machine_restart(char *command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	void __iomem *reg =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		ioremap(PIC32_BASE_RESET + PIC32_RSWRST, sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	pic32_syskey_unlock();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	/* magic write/read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	__raw_writel(1, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	(void)__raw_readl(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	pic32_halt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static void pic32_machine_halt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	pic32_halt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int __init mips_reboot_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	_machine_restart = pic32_machine_restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	_machine_halt = pic32_machine_halt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	pm_power_off = pic32_machine_halt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) arch_initcall(mips_reboot_setup);