Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2003 Christoph Hellwig (hch@lst.de)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 1999, 2000, 04 Ralf Baechle (ralf@linux-mips.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/sn/addrs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/sn/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/sn/klconfig.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/sn/agent.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/sn/ioc3.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/pci/bridge.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #ifdef CONFIG_NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int pcibus_to_node(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	return bc->nasid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) EXPORT_SYMBOL(pcibus_to_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif /* CONFIG_NUMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static void ip29_fixup_phy(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	int nasid = pcibus_to_node(dev->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	u32 sid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	if (nasid != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		return; /* only needed on second module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	/* enable ethernet PHY on IP29 systemboard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	pci_read_config_dword(dev, PCI_SUBSYSTEM_VENDOR_ID, &sid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	if (sid == (PCI_VENDOR_ID_SGI | (IOC3_SUBSYS_IP29_SYSBOARD) << 16))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		REMOTE_HUB_S(nasid, MD_LED0, 0x09);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			ip29_fixup_phy);