Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2016 Imagination Technologies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Author: Paul Burton <paul.burton@mips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * pcibios_align_resource taken from arch/arm/kernel/bios32.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * We need to avoid collisions with `mirrored' VGA ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * and other strange ISA hardware, so we always want the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * addresses to be allocated in the 0x000-0x0ff region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * modulo 0x400.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * Why? Because some silly external IO cards only decode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * the low 10 bits of the IO address. The 0x00-0xff region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * is reserved for motherboard devices that decode all 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * but we want to try to avoid allocating at 0x2900-0x2bff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * which might have be mirrored at 0x0100-0x03ff..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) resource_size_t pcibios_align_resource(void *data, const struct resource *res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 				resource_size_t size, resource_size_t align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	struct pci_dev *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	resource_size_t start = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	struct pci_host_bridge *host_bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	if (res->flags & IORESOURCE_IO && start & 0x300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		start = (start + 0x3ff) & ~0x3ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	start = (start + align - 1) & ~(align - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	host_bridge = pci_find_host_bridge(dev->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	if (host_bridge->align_resource)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		return host_bridge->align_resource(dev, res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 				start, size, align);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	return start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) void pcibios_fixup_bus(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	pci_read_bridge_bases(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }