^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * BRIEF MODULE DESCRIPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Board specific pci fixups.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2001 MontaVista Software Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * ppopov@mvista.com or source@mvista.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * under the terms of the GNU General Public License as published by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Free Software Foundation; either version 2 of the License, or (at your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * You should have received a copy of the GNU General Public License along
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * with this program; if not, write to the Free Software Foundation, Inc.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * 675 Mass Ave, Cambridge, MA 02139, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/txx9/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/txx9/jmr3927.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned char irq = pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* IRQ rotation (PICMG) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) irq--; /* 0-3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* PCI CardSlot (IDSEL=A23, DevNu=12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* PCIA => PCIC (IDSEL=A23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* NOTE: JMR3927 JP1 must be set to OPEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) irq = (irq + 2) % 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) } else if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* PCI CardSlot (IDSEL=A22, DevNu=11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* PCIA => PCIA (IDSEL=A22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* NOTE: JMR3927 JP1 must be set to OPEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) irq = (irq + 0) % 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* PCI Backplane */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) irq = (irq + 33 - slot) % 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) irq = (irq + 3 + slot) % 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) irq++; /* 1-4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) switch (irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) irq = JMR3927_IRQ_IOC_PCIA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) irq = JMR3927_IRQ_IOC_PCIB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) irq = JMR3927_IRQ_IOC_PCIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) irq = JMR3927_IRQ_IOC_PCID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (dev->bus->parent == NULL &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) irq = JMR3927_IRQ_ETHER0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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