Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2004 ICT CAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Author: Li xiaoyu, ICT CAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *   lixy@ict.ac.cn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Author: Fuxin Zhang, zhangfx@lemote.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <loongson.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) /* South bridge slot number is set by the pci probe process */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) static u8 sb_slot = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	int irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	if (slot == sb_slot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 		switch (PCI_FUNC(dev->devfn)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 		case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 			irq = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 			irq = 11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 			irq = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		irq = LOONGSON_IRQ_BASE + 25 + pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /* Do platform specific device initialization at pci_enable_device() time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) int pcibios_plat_dev_init(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static void loongson2e_nec_fixup(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	/* Configures port 1, 2, 3, 4 to be validate*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	pci_read_config_dword(pdev, 0xe0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	/* System clock is 48-MHz Oscillator. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	pci_write_config_dword(pdev, 0xe4, 1 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static void loongson2e_686b_func0_fixup(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	unsigned char c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	sb_slot = PCI_SLOT(pdev->devfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	printk(KERN_INFO "via686b fix: ISA bridge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	/*  Enable I/O Recovery time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	pci_write_config_byte(pdev, 0x40, 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	/*  Enable ISA refresh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	pci_write_config_byte(pdev, 0x41, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	/*  disable ISA line buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	pci_write_config_byte(pdev, 0x45, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	/*  Gate INTR, and flush line buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	pci_write_config_byte(pdev, 0x46, 0xe0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	/*  Disable PCI Delay Transaction, Enable EISA ports 4D0/4D1. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	/* pci_write_config_byte(pdev, 0x47, 0x20); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	 *  enable PCI Delay Transaction, Enable EISA ports 4D0/4D1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	 *  enable time-out timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	pci_write_config_byte(pdev, 0x47, 0xe6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	 * enable level trigger on pci irqs: 9,10,11,13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	 * important! without this PCI interrupts won't work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	outb(0x2e, 0x4d1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	/*  512 K PCI Decode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	pci_write_config_byte(pdev, 0x48, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	/*  Wait for PGNT before grant to ISA Master/DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	pci_write_config_byte(pdev, 0x4a, 0x84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	 * Plug'n'Play
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	 *  Parallel DRQ 3, Floppy DRQ 2 (default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	pci_write_config_byte(pdev, 0x50, 0x0e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	 * IRQ Routing for Floppy and Parallel port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	 *  IRQ 6 for floppy, IRQ 7 for parallel port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	pci_write_config_byte(pdev, 0x51, 0x76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	/* IRQ Routing for serial ports (take IRQ 3 and 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	pci_write_config_byte(pdev, 0x52, 0x34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	/*  All IRQ's level triggered. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	pci_write_config_byte(pdev, 0x54, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	/* route PIRQA-D irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	pci_write_config_byte(pdev, 0x55, 0x90);	/* bit 7-4, PIRQA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	pci_write_config_byte(pdev, 0x56, 0xba);	/* bit 7-4, PIRQC; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 							/* 3-0, PIRQB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	pci_write_config_byte(pdev, 0x57, 0xd0);	/* bit 7-4, PIRQD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	/* enable function 5/6, audio/modem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	pci_read_config_byte(pdev, 0x85, &c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	c &= ~(0x3 << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	pci_write_config_byte(pdev, 0x85, c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	printk(KERN_INFO"via686b fix: ISA bridge done\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static void loongson2e_686b_func1_fixup(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	printk(KERN_INFO"via686b fix: IDE\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	/* Modify IDE controller setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	pci_write_config_byte(pdev, PCI_COMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			      PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			      PCI_COMMAND_MASTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	pci_write_config_byte(pdev, 0x40, 0x0b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	/* legacy mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	pci_write_config_byte(pdev, 0x42, 0x09);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #if 1/* play safe, otherwise we may see notebook's usb keyboard lockup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	/* disable read prefetch/write post buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	pci_write_config_byte(pdev, 0x41, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	/* use 3/4 as fifo thresh hold	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	pci_write_config_byte(pdev, 0x43, 0x0a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	pci_write_config_byte(pdev, 0x44, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	pci_write_config_byte(pdev, 0x45, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	pci_write_config_byte(pdev, 0x41, 0xc2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	pci_write_config_byte(pdev, 0x43, 0x35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	pci_write_config_byte(pdev, 0x44, 0x1c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	pci_write_config_byte(pdev, 0x45, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	printk(KERN_INFO"via686b fix: IDE done\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static void loongson2e_686b_func2_fixup(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	/* irq routing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static void loongson2e_686b_func3_fixup(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	/* irq routing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static void loongson2e_686b_func5_fixup(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	unsigned char c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	/* enable IO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	pci_write_config_byte(pdev, PCI_COMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 			      PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			      PCI_COMMAND_MASTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	pci_read_config_dword(pdev, 0x4, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	pci_write_config_dword(pdev, 0x4, val | 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	/* route ac97 IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	pci_write_config_byte(pdev, 0x3c, 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	pci_read_config_byte(pdev, 0x8, &c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	/* link control: enable link & SGD PCM output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	pci_write_config_byte(pdev, 0x41, 0xcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	/* disable game port, FM, midi, sb, enable write to reg2c-2f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	pci_write_config_byte(pdev, 0x42, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	/* we are using Avance logic codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	pci_write_config_word(pdev, 0x2c, 0x1005);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	pci_write_config_word(pdev, 0x2e, 0x4710);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	pci_read_config_dword(pdev, 0x2c, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	pci_write_config_byte(pdev, 0x42, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			 loongson2e_686b_func0_fixup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 			 loongson2e_686b_func1_fixup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 			 loongson2e_686b_func2_fixup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			 loongson2e_686b_func3_fixup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			 loongson2e_686b_func5_fixup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			 loongson2e_nec_fixup);