^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (c) 2003-2012 Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This software is available to you under a choice of one of two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * licenses. You may choose to be licensed under the terms of the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * General Public License (GPL) Version 2, available from the file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * COPYING in the main directory of this source tree, or the Broadcom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * license below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * notice, this list of conditions and the following disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * 2. Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * notice, this list of conditions and the following disclaimer in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * the documentation and/or other materials provided with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/irqreturn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/netlogic/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/netlogic/xlr/fmn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/netlogic/common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define COP2_CC_INIT_CPU_DEST(dest, conf) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) nlm_write_c2_cc##dest(0, conf[(dest * 8) + 0]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) nlm_write_c2_cc##dest(1, conf[(dest * 8) + 1]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) nlm_write_c2_cc##dest(2, conf[(dest * 8) + 2]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) nlm_write_c2_cc##dest(3, conf[(dest * 8) + 3]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) nlm_write_c2_cc##dest(4, conf[(dest * 8) + 4]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) nlm_write_c2_cc##dest(5, conf[(dest * 8) + 5]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) nlm_write_c2_cc##dest(6, conf[(dest * 8) + 6]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) nlm_write_c2_cc##dest(7, conf[(dest * 8) + 7]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct fmn_message_handler {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) void (*action)(int, int, int, int, struct nlm_fmn_msg *, void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) void *arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) } msg_handlers[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * FMN interrupt handler. We configure the FMN so that any messages in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * any of the CPU buckets will trigger an interrupt on the CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * The message can be from any device on the FMN (like NAE/SAE/DMA).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * The source station id is used to figure out which of the registered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * handlers have to be called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static irqreturn_t fmn_message_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct fmn_message_handler *hndlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int bucket, rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int size = 0, code = 0, src_stnid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct nlm_fmn_msg msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) uint32_t mflags, bkt_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) mflags = nlm_cop2_enable_irqsave();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* Disable message ring interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) nlm_fmn_setup_intr(irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* 8 bkts per core, [24:31] each bit represents one bucket
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * Bit is Zero if bucket is not empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) bkt_status = (nlm_read_c2_status0() >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (bkt_status == 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) for (bucket = 0; bucket < 8; bucket++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Continue on empty bucket */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (bkt_status & (1 << bucket))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) rv = nlm_fmn_receive(bucket, &size, &code, &src_stnid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (rv != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) hndlr = &msg_handlers[src_stnid];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (hndlr->action == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) pr_warn("No msgring handler for stnid %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) src_stnid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) nlm_cop2_disable_irqrestore(mflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) hndlr->action(bucket, src_stnid, size, code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) &msg, hndlr->arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) mflags = nlm_cop2_enable_irqsave();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* Enable message ring intr, to any thread in core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) nlm_fmn_setup_intr(irq, (1 << nlm_threads_per_core) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) nlm_cop2_disable_irqrestore(mflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) void xlr_percpu_fmn_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct xlr_fmn_info *cpu_fmn_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int *bucket_sizes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) uint32_t flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) BUG_ON(nlm_thread_id() != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) id = nlm_core_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) bucket_sizes = xlr_board_fmn_config.bucket_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) cpu_fmn_info = &xlr_board_fmn_config.cpu[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) flags = nlm_cop2_enable_irqsave();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Setup bucket sizes for the core. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) nlm_write_c2_bucksize(0, bucket_sizes[id * 8 + 0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) nlm_write_c2_bucksize(1, bucket_sizes[id * 8 + 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) nlm_write_c2_bucksize(2, bucket_sizes[id * 8 + 2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) nlm_write_c2_bucksize(3, bucket_sizes[id * 8 + 3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) nlm_write_c2_bucksize(4, bucket_sizes[id * 8 + 4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) nlm_write_c2_bucksize(5, bucket_sizes[id * 8 + 5]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) nlm_write_c2_bucksize(6, bucket_sizes[id * 8 + 6]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) nlm_write_c2_bucksize(7, bucket_sizes[id * 8 + 7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * For sending FMN messages, we need credits on the destination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * bucket. Program the credits this core has on the 128 possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * destination buckets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * We cannot use a loop here, because the the first argument has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * to be a constant integer value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) COP2_CC_INIT_CPU_DEST(0, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) COP2_CC_INIT_CPU_DEST(1, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) COP2_CC_INIT_CPU_DEST(2, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) COP2_CC_INIT_CPU_DEST(3, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) COP2_CC_INIT_CPU_DEST(4, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) COP2_CC_INIT_CPU_DEST(5, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) COP2_CC_INIT_CPU_DEST(6, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) COP2_CC_INIT_CPU_DEST(7, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) COP2_CC_INIT_CPU_DEST(8, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) COP2_CC_INIT_CPU_DEST(9, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) COP2_CC_INIT_CPU_DEST(10, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) COP2_CC_INIT_CPU_DEST(11, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) COP2_CC_INIT_CPU_DEST(12, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) COP2_CC_INIT_CPU_DEST(13, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) COP2_CC_INIT_CPU_DEST(14, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) COP2_CC_INIT_CPU_DEST(15, cpu_fmn_info->credit_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* enable FMN interrupts on this CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) nlm_fmn_setup_intr(IRQ_FMN, (1 << nlm_threads_per_core) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) nlm_cop2_disable_irqrestore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * Register a FMN message handler with respect to the source station id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * @stnid: source station id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * @action: Handler function pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) int nlm_register_fmn_handler(int start_stnid, int end_stnid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) void (*action)(int, int, int, int, struct nlm_fmn_msg *, void *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) int sstnid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) for (sstnid = start_stnid; sstnid <= end_stnid; sstnid++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) msg_handlers[sstnid].arg = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) smp_wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) msg_handlers[sstnid].action = action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) pr_debug("Registered FMN msg handler for stnid %d-%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) start_stnid, end_stnid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) void nlm_setup_fmn_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) uint32_t flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* request irq only once */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (request_irq(IRQ_FMN, fmn_message_handler, IRQF_PERCPU, "fmn", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) pr_err("Failed to request irq %d (fmn)\n", IRQ_FMN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) flags = nlm_cop2_enable_irqsave();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) nlm_fmn_setup_intr(IRQ_FMN, (1 << nlm_threads_per_core) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) nlm_cop2_disable_irqrestore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags