^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This software is available to you under a choice of one of two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * licenses. You may choose to be licensed under the terms of the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * General Public License (GPL) Version 2, available from the file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * COPYING in the main directory of this source tree, or the NetLogic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * license below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * notice, this list of conditions and the following disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * 2. Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * notice, this list of conditions and the following disclaimer in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * the documentation and/or other materials provided with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/idle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/netlogic/haldefs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/netlogic/common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <asm/netlogic/xlp-hal/iomap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <asm/netlogic/xlp-hal/xlp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <asm/netlogic/xlp-hal/sys.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) uint64_t nlm_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) cpumask_t nlm_cpumask = CPU_MASK_CPU0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned int nlm_threads_per_core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static void nlm_linux_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) uint64_t sysbase = nlm_get_node(0)->sysbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (cpu_is_xlp9xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) nlm_write_sys_reg(sysbase, SYS_9XX_CHIP_RESET, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) for ( ; ; )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) cpu_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static void nlm_fixup_mem(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) const int pref_backup = 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct memblock_region *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) for_each_mem_region(mem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) memblock_remove(mem->base + mem->size - pref_backup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) pref_backup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static void __init xlp_init_mem_from_bars(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) uint64_t map[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int i, n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) n = nlm_get_dram_map(-1, map, ARRAY_SIZE(map)); /* -1 : all nodes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) for (i = 0; i < n; i += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* exclude 0x1000_0000-0x2000_0000, u-boot device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (map[i] <= 0x10000000 && map[i+1] > 0x10000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) map[i+1] = 0x10000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (map[i] > 0x10000000 && map[i] < 0x20000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) map[i] = 0x20000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) memblock_add(map[i], map[i+1] - map[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) void __init plat_mem_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) nlm_wakeup_secondary_cpus();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* update TLB size after waking up threads */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) register_smp_ops(&nlm_smp_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) _machine_restart = (void (*)(char *))nlm_linux_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) _machine_halt = nlm_linux_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) pm_power_off = nlm_linux_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* memory and bootargs from DT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) xlp_early_init_devtree();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (memblock_end_of_DRAM() == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) pr_info("Using DRAM BARs for memory map.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) xlp_init_mem_from_bars();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* Calculate and setup wired entries for mapped kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) nlm_fixup_mem();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) const char *get_system_type(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) switch (read_c0_prid() & PRID_IMP_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) case PRID_IMP_NETLOGIC_XLP9XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) case PRID_IMP_NETLOGIC_XLP5XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) case PRID_IMP_NETLOGIC_XLP2XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return "Broadcom XLPII Series";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return "Netlogic XLP Series";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) void __init prom_free_prom_memory(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* Nothing yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) void xlp_mmu_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) u32 conf4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (cpu_is_xlpii()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* XLPII series has extended pagesize in config 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) conf4 = read_c0_config4() & ~0x1f00u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) write_c0_config4(conf4 | ((PAGE_SHIFT - 10) / 2 << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* enable extended TLB and Large Fixed TLB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) write_c0_config6(read_c0_config6() | 0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* set page mask of extended Fixed TLB in config7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) write_c0_config7(PM_DEFAULT_MASK >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) void nlm_percpu_init(int hwcpuid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) void __init prom_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) void *reset_vec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) nlm_init_boot_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) xlp_mmu_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) nlm_node_init(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) xlp_dt_init((void *)(long)fw_arg0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* Update reset entry point with CPU init code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) memset(reset_vec, 0, RESET_VEC_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) memcpy(reset_vec, (void *)nlm_reset_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) (nlm_reset_entry_end - nlm_reset_entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) cpumask_setall(&nlm_cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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