^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This software is available to you under a choice of one of two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * licenses. You may choose to be licensed under the terms of the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * General Public License (GPL) Version 2, available from the file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * COPYING in the main directory of this source tree, or the NetLogic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * license below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * notice, this list of conditions and the following disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * 2. Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * notice, this list of conditions and the following disclaimer in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * the documentation and/or other materials provided with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/regdef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/stackframe.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/asmmacro.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/addrspace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/netlogic/common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <asm/netlogic/xlp-hal/iomap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <asm/netlogic/xlp-hal/xlp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <asm/netlogic/xlp-hal/sys.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <asm/netlogic/xlp-hal/cpucontrol.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .set noreorder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .set noat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .set arch=xlr /* for mfcr/mtcr, XLR is sufficient */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Called by the boot cpu to wake up its sibling threads */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) NESTED(xlp_boot_core0_siblings, PT_SIZE, sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* CPU register contents lost when enabling threads, save them first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) SAVE_ALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* find the location to which nlm_boot_siblings was relocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) li t0, CKSEG1ADDR(RESET_VEC_PHYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PTR_LA t1, nlm_reset_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PTR_LA t2, nlm_boot_siblings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) dsubu t2, t1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) daddu t2, t0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* call it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) jalr t2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) RESTORE_ALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) jr ra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) END(xlp_boot_core0_siblings)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) NESTED(nlm_boot_secondary_cpus, 16, sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* Initialize CP0 Status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) move t1, zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ori t1, ST0_KX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) mtc0 t1, CP0_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PTR_LA t1, nlm_next_sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PTR_L sp, 0(t1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PTR_LA t1, nlm_next_gp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PTR_L gp, 0(t1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* a0 has the processor id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) mfc0 a0, CP0_EBASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) andi a0, 0x3ff /* a0 <- node/core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PTR_LA t0, nlm_early_init_secondary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) jalr t0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PTR_LA t0, smp_bootstrap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) jr t0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) END(nlm_boot_secondary_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * In case of RMIboot bootloader which is used on XLR boards, the CPUs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * be already woken up and waiting in bootloader code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * This will get them out of the bootloader code and into linux. Needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * because the bootloader area will be taken and initialized by linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) NESTED(nlm_rmiboot_preboot, 16, sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) mfc0 t0, $15, 1 /* read ebase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) andi t0, 0x1f /* t0 has the processor_id() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) andi t2, t0, 0x3 /* thread num */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) sll t0, 2 /* offset in cpu array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) li t3, CKSEG1ADDR(RESET_DATA_PHYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ADDIU t1, t3, BOOT_CPU_READY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ADDU t1, t0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) li t3, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) sw t3, 0(t1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) bnez t2, 1f /* skip thread programming */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) nop /* for thread id != 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * XLR MMU setup only for first thread in core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) li t0, 0x400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) mfcr t1, t0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) li t2, 6 /* XLR thread mode mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) nor t3, t2, zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) and t2, t1, t2 /* t2 - current thread mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) li v0, CKSEG1ADDR(RESET_DATA_PHYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) lw v1, BOOT_THREAD_MODE(v0) /* v1 - new thread mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) sll v1, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) beq v1, t2, 1f /* same as request value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) nop /* nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) and t2, t1, t3 /* mask out old thread mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) or t1, t2, v1 /* put in new value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) mtcr t1, t0 /* update core control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* wait for NMI to hit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 1: wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) b 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) END(nlm_rmiboot_preboot)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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