Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * r2300.c: R2000 and R3000 specific mmu/cache code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * with a lot of changes to make this thing work for R3000s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Tx39XX R4k style caches added. HK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 1998, 1999, 2000 Harald Koerfgen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Copyright (C) 2001, 2004, 2007  Maciej W. Rozycki
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/mmu_context.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/isadep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static unsigned long icache_size, dcache_size;		/* Size in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static unsigned long icache_lsize, dcache_lsize;	/* Size in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) unsigned long r3k_cache_size(unsigned long ca_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	unsigned long flags, status, dummy, size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	volatile unsigned long *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	p = (volatile unsigned long *) KSEG0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	flags = read_c0_status();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	/* isolate cache space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	write_c0_status((ca_flags|flags)&~ST0_IEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	*p = 0xa5a55a5a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	dummy = *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	status = read_c0_status();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	if (dummy != 0xa5a55a5a || (status & ST0_CM)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		for (size = 128; size <= 0x40000; size <<= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 			*(p + size) = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		*p = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		for (size = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		     (size <= 0x40000) && (*(p + size) == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		     size <<= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 			;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		if (size > 0x40000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 			size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	write_c0_status(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	return size * sizeof(*p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) unsigned long r3k_cache_lsize(unsigned long ca_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	unsigned long flags, status, lsize, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	volatile unsigned long *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	p = (volatile unsigned long *) KSEG0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	flags = read_c0_status();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	/* isolate cache space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	write_c0_status((ca_flags|flags)&~ST0_IEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	for (i = 0; i < 128; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		*(p + i) = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	*(volatile unsigned char *)p = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	for (lsize = 1; lsize < 128; lsize <<= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		*(p + lsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		status = read_c0_status();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		if (!(status & ST0_CM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	for (i = 0; i < 128; i += lsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		*(volatile unsigned char *)(p + i) = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	write_c0_status(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	return lsize * sizeof(*p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) static void r3k_probe_cache(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	dcache_size = r3k_cache_size(ST0_ISC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (dcache_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		dcache_lsize = r3k_cache_lsize(ST0_ISC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	icache_size = r3k_cache_size(ST0_ISC|ST0_SWC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (icache_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		icache_lsize = r3k_cache_lsize(ST0_ISC|ST0_SWC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static void r3k_flush_icache_range(unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	unsigned long size, i, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	volatile unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	size = end - start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (size > icache_size || KSEGX(start) != KSEG0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		start = KSEG0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		size = icache_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	p = (char *)start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	flags = read_c0_status();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	/* isolate cache space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	for (i = 0; i < size; i += 0x080) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		asm(	"sb\t$0, 0x000(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			"sb\t$0, 0x004(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			"sb\t$0, 0x008(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			"sb\t$0, 0x00c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			"sb\t$0, 0x010(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			"sb\t$0, 0x014(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			"sb\t$0, 0x018(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			"sb\t$0, 0x01c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			"sb\t$0, 0x020(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			"sb\t$0, 0x024(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			"sb\t$0, 0x028(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			"sb\t$0, 0x02c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			"sb\t$0, 0x030(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			"sb\t$0, 0x034(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			"sb\t$0, 0x038(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			"sb\t$0, 0x03c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			"sb\t$0, 0x040(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			"sb\t$0, 0x044(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			"sb\t$0, 0x048(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			"sb\t$0, 0x04c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			"sb\t$0, 0x050(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			"sb\t$0, 0x054(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			"sb\t$0, 0x058(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			"sb\t$0, 0x05c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			"sb\t$0, 0x060(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			"sb\t$0, 0x064(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			"sb\t$0, 0x068(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			"sb\t$0, 0x06c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			"sb\t$0, 0x070(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			"sb\t$0, 0x074(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			"sb\t$0, 0x078(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			"sb\t$0, 0x07c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			: : "r" (p) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		p += 0x080;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	write_c0_status(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	unsigned long size, i, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	volatile unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	size = end - start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (size > dcache_size || KSEGX(start) != KSEG0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		start = KSEG0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		size = dcache_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	p = (char *)start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	flags = read_c0_status();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	/* isolate cache space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	write_c0_status((ST0_ISC|flags)&~ST0_IEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	for (i = 0; i < size; i += 0x080) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		asm(	"sb\t$0, 0x000(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 			"sb\t$0, 0x004(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			"sb\t$0, 0x008(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			"sb\t$0, 0x00c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			"sb\t$0, 0x010(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 			"sb\t$0, 0x014(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			"sb\t$0, 0x018(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 			"sb\t$0, 0x01c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 			"sb\t$0, 0x020(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			"sb\t$0, 0x024(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			"sb\t$0, 0x028(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 			"sb\t$0, 0x02c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			"sb\t$0, 0x030(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			"sb\t$0, 0x034(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 			"sb\t$0, 0x038(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 			"sb\t$0, 0x03c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			"sb\t$0, 0x040(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			"sb\t$0, 0x044(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 			"sb\t$0, 0x048(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			"sb\t$0, 0x04c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 			"sb\t$0, 0x050(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 			"sb\t$0, 0x054(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 			"sb\t$0, 0x058(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			"sb\t$0, 0x05c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			"sb\t$0, 0x060(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 			"sb\t$0, 0x064(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			"sb\t$0, 0x068(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			"sb\t$0, 0x06c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			"sb\t$0, 0x070(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			"sb\t$0, 0x074(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			"sb\t$0, 0x078(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 			"sb\t$0, 0x07c(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			: : "r" (p) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		p += 0x080;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	write_c0_status(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static inline void r3k_flush_cache_all(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static inline void r3k___flush_cache_all(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	r3k_flush_dcache_range(KSEG0, KSEG0 + dcache_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	r3k_flush_icache_range(KSEG0, KSEG0 + icache_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static void r3k_flush_cache_mm(struct mm_struct *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static void r3k_flush_cache_range(struct vm_area_struct *vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 				  unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static void r3k_flush_cache_page(struct vm_area_struct *vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 				 unsigned long addr, unsigned long pfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	unsigned long kaddr = KSEG0ADDR(pfn << PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	int exec = vma->vm_flags & VM_EXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	struct mm_struct *mm = vma->vm_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	pmd_t *pmdp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	pte_t *ptep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	pr_debug("cpage[%08llx,%08lx]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		 cpu_context(smp_processor_id(), mm), addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	/* No ASID => no such page in the cache.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	if (cpu_context(smp_processor_id(), mm) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	pmdp = pmd_off(mm, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	ptep = pte_offset_kernel(pmdp, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	/* Invalid => no such page in the cache.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	if (!(pte_val(*ptep) & _PAGE_PRESENT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	r3k_flush_dcache_range(kaddr, kaddr + PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	if (exec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		r3k_flush_icache_range(kaddr, kaddr + PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static void local_r3k_flush_data_cache_page(void *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static void r3k_flush_data_cache_page(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static void r3k_flush_kernel_vmap_range(unsigned long vaddr, int size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	/* Catch bad driver code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	BUG_ON(size == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	iob();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	r3k_flush_dcache_range(start, start + size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) void r3k_cache_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	extern void build_clear_page(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	extern void build_copy_page(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	r3k_probe_cache();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	flush_cache_all = r3k_flush_cache_all;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	__flush_cache_all = r3k___flush_cache_all;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	flush_cache_mm = r3k_flush_cache_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	flush_cache_range = r3k_flush_cache_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	flush_cache_page = r3k_flush_cache_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	flush_icache_range = r3k_flush_icache_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	local_flush_icache_range = r3k_flush_icache_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	__flush_icache_user_range = r3k_flush_icache_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	__local_flush_icache_user_range = r3k_flush_icache_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	__flush_kernel_vmap_range = r3k_flush_kernel_vmap_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	local_flush_data_cache_page = local_r3k_flush_data_cache_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	flush_data_cache_page = r3k_flush_data_cache_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	_dma_cache_wback_inv = r3k_dma_cache_wback_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	_dma_cache_wback = r3k_dma_cache_wback_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	_dma_cache_inv = r3k_dma_cache_wback_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	pr_info("Primary instruction cache %ldkB, linesize %ld bytes.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		icache_size >> 10, icache_lsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	pr_info("Primary data cache %ldkB, linesize %ld bytes.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		dcache_size >> 10, dcache_lsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	build_clear_page();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	build_copy_page();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }