Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /* IEEE754 floating point arithmetic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * single precision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * MIPS floating point support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 1994-2000 Algorithmics Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (C) 2017 Imagination Technologies, Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Author: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "ieee754sp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) union ieee754sp ieee754sp_rint(union ieee754sp x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	union ieee754sp ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	u32 residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	int sticky;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	int round;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	int odd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	COMPXDP;		/* <-- DP needed for 64-bit mantissa tmp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	ieee754_clearcx();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	EXPLODEXSP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	FLUSHXSP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	if (xc == IEEE754_CLASS_SNAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		return ieee754sp_nanxcpt(x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	if ((xc == IEEE754_CLASS_QNAN) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	    (xc == IEEE754_CLASS_INF) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	    (xc == IEEE754_CLASS_ZERO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		return x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	if (xe >= SP_FBITS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		return x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	if (xe < -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		residue = xm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		round = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		sticky = residue != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		xm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		residue = xm << (xe + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		residue <<= 31 - SP_FBITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		round = (residue >> 31) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		sticky = (residue << 1) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		xm >>= SP_FBITS - xe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	odd = (xm & 0x1) != 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	switch (ieee754_csr.rm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	case FPU_CSR_RN:	/* toward nearest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		if (round && (sticky || odd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 			xm++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	case FPU_CSR_RZ:	/* toward zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	case FPU_CSR_RU:	/* toward +infinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		if ((round || sticky) && !xs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 			xm++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	case FPU_CSR_RD:	/* toward -infinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 		if ((round || sticky) && xs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 			xm++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	if (round || sticky)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 		ieee754_setcx(IEEE754_INEXACT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	ret = ieee754sp_flong(xm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	SPSIGN(ret) = xs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }