Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/mm_types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/sched/task.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <asm/branch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <asm/fpu_emulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <asm/inst.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * struct emuframe - The 'emulation' frame structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * @emul:	The instruction to 'emulate'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * @badinst:	A break instruction to cause a return to the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * This structure defines the frames placed within the delay slot emulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * page in response to a call to mips_dsemul(). Each thread may be allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * only one frame at any given time. The kernel stores within it the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * instruction to be 'emulated' followed by a break instruction, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * executes the frame in user mode. The break causes a trap to the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * which leads to do_dsemulret() being called unless the instruction in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * @emul causes a trap itself, is a branch, or a signal is delivered to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * the thread. In these cases the allocated frame will either be reused by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * a subsequent delay slot 'emulation', or be freed during signal delivery or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * upon thread exit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * This approach is used because:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * - Actually emulating all instructions isn't feasible. We would need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  *   be able to handle instructions from all revisions of the MIPS ISA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  *   all ASEs & all vendor instruction set extensions. This would be a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  *   whole lot of work & continual maintenance burden as new instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  *   are introduced, and in the case of some vendor extensions may not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  *   even be possible. Thus we need to take the approach of actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  *   executing the instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * - We must execute the instruction within user context. If we were to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *   execute the instruction in kernel mode then it would have access to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  *   kernel resources without very careful checks, leaving us with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  *   high potential for security or stability issues to arise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * - We used to place the frame on the users stack, but this requires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  *   that the stack be executable. This is bad for security so the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  *   per-process page is now used instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * - The instruction in @emul may be something entirely invalid for a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  *   delay slot. The user may (intentionally or otherwise) place a branch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  *   in a delay slot, or a kernel mode instruction, or something else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  *   which generates an exception. Thus we can't rely upon the break in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  *   @badinst always being hit. For this reason we track the index of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  *   frame allocated to each thread, allowing us to clean it up at later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  *   points such as signal delivery or thread exit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * - The user may generate a fake struct emuframe if they wish, invoking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  *   the BRK_MEMU break instruction themselves. We must therefore not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  *   trust that BRK_MEMU means there's actually a valid frame allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  *   to the thread, and must not allow the user to do anything they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  *   couldn't already.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) struct emuframe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	mips_instruction	emul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	mips_instruction	badinst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static const int emupage_frame_count = PAGE_SIZE / sizeof(struct emuframe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static inline __user struct emuframe *dsemul_page(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	return (__user struct emuframe *)STACK_TOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static int alloc_emuframe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	mm_context_t *mm_ctx = &current->mm->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) retry:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	spin_lock(&mm_ctx->bd_emupage_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	/* Ensure we have an allocation bitmap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (!mm_ctx->bd_emupage_allocmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		mm_ctx->bd_emupage_allocmap =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			kcalloc(BITS_TO_LONGS(emupage_frame_count),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 					      sizeof(unsigned long),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 				GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		if (!mm_ctx->bd_emupage_allocmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			idx = BD_EMUFRAME_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	/* Attempt to allocate a single bit/frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	idx = bitmap_find_free_region(mm_ctx->bd_emupage_allocmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				      emupage_frame_count, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (idx < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		 * Failed to allocate a frame. We'll wait until one becomes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		 * available. We unlock the page so that other threads actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		 * get the opportunity to free their frames, which means
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		 * technically the result of bitmap_full may be incorrect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		 * However the worst case is that we repeat all this and end up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		 * back here again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		spin_unlock(&mm_ctx->bd_emupage_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		if (!wait_event_killable(mm_ctx->bd_emupage_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			!bitmap_full(mm_ctx->bd_emupage_allocmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 				     emupage_frame_count)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			goto retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		/* Received a fatal signal - just give in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		return BD_EMUFRAME_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	/* Success! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	pr_debug("allocate emuframe %d to %d\n", idx, current->pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	spin_unlock(&mm_ctx->bd_emupage_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	return idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static void free_emuframe(int idx, struct mm_struct *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	mm_context_t *mm_ctx = &mm->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	spin_lock(&mm_ctx->bd_emupage_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	pr_debug("free emuframe %d from %d\n", idx, current->pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	bitmap_clear(mm_ctx->bd_emupage_allocmap, idx, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	/* If some thread is waiting for a frame, now's its chance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	wake_up(&mm_ctx->bd_emupage_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	spin_unlock(&mm_ctx->bd_emupage_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static bool within_emuframe(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	unsigned long base = (unsigned long)dsemul_page();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	if (regs->cp0_epc < base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if (regs->cp0_epc >= (base + PAGE_SIZE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) bool dsemul_thread_cleanup(struct task_struct *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	int fr_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	/* Clear any allocated frame, retrieving its index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	fr_idx = atomic_xchg(&tsk->thread.bd_emu_frame, BD_EMUFRAME_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	/* If no frame was allocated, we're done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (fr_idx == BD_EMUFRAME_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	task_lock(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	/* Free the frame that this thread had allocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (tsk->mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		free_emuframe(fr_idx, tsk->mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	task_unlock(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) bool dsemul_thread_rollback(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct emuframe __user *fr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	int fr_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	/* Do nothing if we're not executing from a frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (!within_emuframe(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	/* Find the frame being executed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	fr_idx = atomic_read(&current->thread.bd_emu_frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	if (fr_idx == BD_EMUFRAME_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	fr = &dsemul_page()[fr_idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	 * If the PC is at the emul instruction, roll back to the branch. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	 * PC is at the badinst (break) instruction, we've already emulated the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	 * instruction so progress to the continue PC. If it's anything else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	 * then something is amiss & the user has branched into some other area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	 * of the emupage - we'll free the allocated frame anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (msk_isa16_mode(regs->cp0_epc) == (unsigned long)&fr->emul)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		regs->cp0_epc = current->thread.bd_emu_branch_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	else if (msk_isa16_mode(regs->cp0_epc) == (unsigned long)&fr->badinst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		regs->cp0_epc = current->thread.bd_emu_cont_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	free_emuframe(fr_idx, current->mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) void dsemul_mm_cleanup(struct mm_struct *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	mm_context_t *mm_ctx = &mm->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	kfree(mm_ctx->bd_emupage_allocmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		unsigned long branch_pc, unsigned long cont_pc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	int isa16 = get_isa16_mode(regs->cp0_epc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	mips_instruction break_math;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	unsigned long fr_uaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct emuframe fr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	int fr_idx, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	/* NOP is easy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (ir == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	/* microMIPS instructions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (isa16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		union mips_instruction insn = { .word = ir };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		/* NOP16 aka MOVE16 $0, $0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		if ((ir >> 16) == MM_NOP16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		/* ADDIUPC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		if (insn.mm_a_format.opcode == mm_addiupc_op) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			unsigned int rs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			s32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			rs = (((insn.mm_a_format.rs + 0xe) & 0xf) + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			v = regs->cp0_epc & ~3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			v += insn.mm_a_format.simmediate << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			regs->regs[rs] = (long)v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	pr_debug("dsemul 0x%08lx cont at 0x%08lx\n", regs->cp0_epc, cont_pc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	/* Allocate a frame if we don't already have one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	fr_idx = atomic_read(&current->thread.bd_emu_frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	if (fr_idx == BD_EMUFRAME_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		fr_idx = alloc_emuframe();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (fr_idx == BD_EMUFRAME_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		return SIGBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	/* Retrieve the appropriately encoded break instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	break_math = BREAK_MATH(isa16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	/* Write the instructions to the frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (isa16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		union mips_instruction _emul = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			.halfword = { ir >> 16, ir }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		union mips_instruction _badinst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			.halfword = { break_math >> 16, break_math }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		fr.emul = _emul.word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		fr.badinst = _badinst.word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		fr.emul = ir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		fr.badinst = break_math;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	/* Write the frame to user memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	fr_uaddr = (unsigned long)&dsemul_page()[fr_idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	ret = access_process_vm(current, fr_uaddr, &fr, sizeof(fr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 				FOLL_FORCE | FOLL_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (unlikely(ret != sizeof(fr))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		MIPS_FPU_EMU_INC_STATS(errors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		free_emuframe(fr_idx, current->mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		return SIGBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	/* Record the PC of the branch, PC to continue from & frame index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	current->thread.bd_emu_branch_pc = branch_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	current->thread.bd_emu_cont_pc = cont_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	atomic_set(&current->thread.bd_emu_frame, fr_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	/* Change user register context to execute the frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	regs->cp0_epc = fr_uaddr | isa16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) bool do_dsemulret(struct pt_regs *xcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	/* Cleanup the allocated frame, returning if there wasn't one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	if (!dsemul_thread_cleanup(current)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		MIPS_FPU_EMU_INC_STATS(errors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	/* Set EPC to return to post-branch instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	xcp->cp0_epc = current->thread.bd_emu_cont_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	pr_debug("dsemulret to 0x%08lx\n", xcp->cp0_epc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	MIPS_FPU_EMU_INC_STATS(ds_emul);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }