Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * IEEE754 floating point arithmetic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * double precision: CLASS.f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * FPR[fd] = class(FPR[fs])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * MIPS floating point support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (C) 2015 Imagination Technologies, Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Author: Markos Chandras <markos.chandras@imgtec.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "ieee754dp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) int ieee754dp_2008class(union ieee754dp x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	COMPXDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	EXPLODEXDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	 * 10 bit mask as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	 * bit0 = SNAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	 * bit1 = QNAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	 * bit2 = -INF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	 * bit3 = -NORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	 * bit4 = -DNORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	 * bit5 = -ZERO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	 * bit6 = INF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	 * bit7 = NORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	 * bit8 = DNORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	 * bit9 = ZERO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	switch(xc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	case IEEE754_CLASS_SNAN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		return 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	case IEEE754_CLASS_QNAN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		return 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	case IEEE754_CLASS_INF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		return 0x04 << (xs ? 0 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	case IEEE754_CLASS_NORM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		return 0x08 << (xs ? 0 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	case IEEE754_CLASS_DNORM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		return 0x10 << (xs ? 0 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	case IEEE754_CLASS_ZERO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		return 0x20 << (xs ? 0 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		pr_err("Unknown class: %d\n", xc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }