Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Based on Ocelot Linux port, which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright 2001 MontaVista Software Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Author: jsun@mvista.com or jsun@junsun.net
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright 2003 ICT CAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Author: Michael Guo <guoyi@ict.ac.cn>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Author: Fuxin Zhang, zhangfx@lemote.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * Copyright (C) 2009 Lemote Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * Author: Wu Zhangjin, wuzhangjin@gmail.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/pci_ids.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <loongson.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <boot_param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <builtin_dtbs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <workarounds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define HOST_BRIDGE_CONFIG_ADDR	((void __iomem *)TO_UNCAC(0x1a000000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) u32 cpu_clock_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) EXPORT_SYMBOL(cpu_clock_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) struct efi_memory_map_loongson *loongson_memmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) struct loongson_system_configuration loongson_sysconf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) u64 loongson_chiptemp[MAX_PACKAGES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) u64 loongson_freqctrl[MAX_PACKAGES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) unsigned long long smp_group[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) const char *get_system_type(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	return "Generic Loongson64 System";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) void __init prom_init_env(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct boot_params *boot_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct loongson_params *loongson_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct system_loongson *esys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct efi_cpuinfo_loongson *ecpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct irq_source_routing_table *eirq_source;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	u32 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	u16 vendor, device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	/* firmware arguments are initialized in head.S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	boot_p = (struct boot_params *)fw_arg2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	loongson_p = &(boot_p->efi.smbios.lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	esys = (struct system_loongson *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		((u64)loongson_p + loongson_p->system_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	ecpu = (struct efi_cpuinfo_loongson *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		((u64)loongson_p + loongson_p->cpu_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	eirq_source = (struct irq_source_routing_table *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		((u64)loongson_p + loongson_p->irq_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	loongson_memmap = (struct efi_memory_map_loongson *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		((u64)loongson_p + loongson_p->memory_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	cpu_clock_freq = ecpu->cpu_clock_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	loongson_sysconf.cputype = ecpu->cputype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	switch (ecpu->cputype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	case Legacy_3A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	case Loongson_3A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		loongson_sysconf.cores_per_node = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		loongson_sysconf.cores_per_package = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		smp_group[0] = 0x900000003ff01000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		smp_group[1] = 0x900010003ff01000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		smp_group[2] = 0x900020003ff01000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		smp_group[3] = 0x900030003ff01000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		loongson_chipcfg[0] = 0x900000001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		loongson_chipcfg[1] = 0x900010001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		loongson_chipcfg[2] = 0x900020001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		loongson_chipcfg[3] = 0x900030001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		loongson_chiptemp[0] = 0x900000001fe0019c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		loongson_chiptemp[1] = 0x900010001fe0019c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		loongson_chiptemp[2] = 0x900020001fe0019c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		loongson_chiptemp[3] = 0x900030001fe0019c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		loongson_freqctrl[0] = 0x900000001fe001d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		loongson_freqctrl[1] = 0x900010001fe001d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		loongson_freqctrl[2] = 0x900020001fe001d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		loongson_freqctrl[3] = 0x900030001fe001d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		loongson_sysconf.ht_control_base = 0x90000EFDFB000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	case Legacy_3B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	case Loongson_3B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		loongson_sysconf.cores_per_package = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		smp_group[0] = 0x900000003ff01000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		smp_group[1] = 0x900010003ff05000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		smp_group[2] = 0x900020003ff09000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		smp_group[3] = 0x900030003ff0d000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		loongson_chipcfg[0] = 0x900000001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		loongson_chipcfg[1] = 0x900020001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		loongson_chipcfg[2] = 0x900040001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		loongson_chipcfg[3] = 0x900060001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		loongson_chiptemp[0] = 0x900000001fe0019c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		loongson_chiptemp[1] = 0x900020001fe0019c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		loongson_chiptemp[2] = 0x900040001fe0019c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		loongson_chiptemp[3] = 0x900060001fe0019c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		loongson_freqctrl[0] = 0x900000001fe001d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		loongson_freqctrl[1] = 0x900020001fe001d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		loongson_freqctrl[2] = 0x900040001fe001d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		loongson_freqctrl[3] = 0x900060001fe001d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		loongson_sysconf.ht_control_base = 0x90001EFDFB000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		loongson_sysconf.cores_per_node = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		loongson_sysconf.cores_per_package = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		loongson_chipcfg[0] = 0x900000001fe00180;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	loongson_sysconf.nr_cpus = ecpu->nr_cpus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		loongson_sysconf.nr_cpus = NR_CPUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		loongson_sysconf.cores_per_node - 1) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		loongson_sysconf.cores_per_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (loongson_sysconf.dma_mask_bits < 32 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		loongson_sysconf.dma_mask_bits > 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		loongson_sysconf.dma_mask_bits = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		loongson_sysconf.vgabios_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	memset(loongson_sysconf.ecname, 0, 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (esys->has_ec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		memcpy(loongson_sysconf.ecname, esys->ec_name, 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	loongson_sysconf.workarounds |= esys->workarounds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	loongson_sysconf.nr_uarts = esys->nr_uarts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if (esys->nr_uarts < 1 || esys->nr_uarts > MAX_UARTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		loongson_sysconf.nr_uarts = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	memcpy(loongson_sysconf.uarts, esys->uarts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		sizeof(struct uart_device) * loongson_sysconf.nr_uarts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	loongson_sysconf.nr_sensors = esys->nr_sensors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	if (loongson_sysconf.nr_sensors > MAX_SENSORS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		loongson_sysconf.nr_sensors = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (loongson_sysconf.nr_sensors)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		memcpy(loongson_sysconf.sensors, esys->sensors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			sizeof(struct sensor_device) * loongson_sysconf.nr_sensors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	pr_info("CpuClock = %u\n", cpu_clock_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	/* Read the ID of PCI host bridge to detect bridge type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	id = readl(HOST_BRIDGE_CONFIG_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	vendor = id & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	device = (id >> 16) & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	switch (vendor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	case PCI_VENDOR_ID_LOONGSON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		pr_info("The bridge chip is LS7A\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		loongson_sysconf.bridgetype = LS7A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		loongson_sysconf.early_config = ls7a_early_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	case PCI_VENDOR_ID_AMD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	case PCI_VENDOR_ID_ATI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		pr_info("The bridge chip is RS780E or SR5690\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		loongson_sysconf.bridgetype = RS780E;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		loongson_sysconf.early_config = rs780e_early_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		pr_info("The bridge chip is VIRTUAL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		loongson_sysconf.bridgetype = VIRTUAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		loongson_sysconf.early_config = virtual_early_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		loongson_fdt_blob = __dtb_loongson64v_4core_virtio_begin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		switch (read_c0_prid() & PRID_REV_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		case PRID_REV_LOONGSON3A_R1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		case PRID_REV_LOONGSON3A_R2_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		case PRID_REV_LOONGSON3A_R2_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		case PRID_REV_LOONGSON3A_R3_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		case PRID_REV_LOONGSON3A_R3_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			switch (loongson_sysconf.bridgetype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 			case LS7A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 				loongson_fdt_blob = __dtb_loongson64c_4core_ls7a_begin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			case RS780E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 				loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		case PRID_REV_LOONGSON3B_R1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		case PRID_REV_LOONGSON3B_R2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			if (loongson_sysconf.bridgetype == RS780E)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 				loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		if (loongson_sysconf.bridgetype == LS7A)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (!loongson_fdt_blob)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		pr_err("Failed to determine built-in Loongson64 dtb\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }