^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Board-specific reboot/shutdown routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2009 Lemote Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Wu Zhangjin, wuzhangjin@gmail.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <loongson.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <cs5536/cs5536.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "ec_kb3310b.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static void reset_cpu(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * reset cpu to full speed, this is needed when enabling cpu frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * scalling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) writel(readl(LOONGSON_CHIPCFG) | 0x7, LOONGSON_CHIPCFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* reset support for fuloong2f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static void fl2f_reboot(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) reset_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* send a reset signal to south bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * NOTE: if enable "Power Management" in kernel, rtl8169 will not reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * normally with this reset operation and it will not work in PMON, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * you can type halt command and then reboot, seems the hardware reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * logic not work normally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u32 hi, lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) _rdmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), &hi, &lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) lo |= 0x00000001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) _wrmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), hi, lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static void fl2f_shutdown(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u32 hi, lo, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int gpio_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* get gpio base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) gpio_base = lo & 0xff00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* make cs5536 gpio13 output enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) val = inl(gpio_base + GPIOL_OUT_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) val &= ~(1 << (16 + 13));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) val |= (1 << 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) outl(val, gpio_base + GPIOL_OUT_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) mmiowb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* make cs5536 gpio13 output low level voltage. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) val = inl(gpio_base + GPIOL_OUT_VAL) & ~(1 << (13));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) val |= (1 << (16 + 13));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) outl(val, gpio_base + GPIOL_OUT_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) mmiowb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* reset support for yeeloong2f and mengloong2f notebook */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static void ml2f_reboot(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) reset_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* sending an reset signal to EC(embedded controller) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ec_write(REG_RESET, BIT_RESET_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define yl2f89_reboot ml2f_reboot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* menglong(7inches) laptop has different shutdown logic from 8.9inches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define EC_SHUTDOWN_IO_PORT_HIGH 0xff2d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define EC_SHUTDOWN_IO_PORT_LOW 0xff2e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define EC_SHUTDOWN_IO_PORT_DATA 0xff2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define REG_SHUTDOWN_HIGH 0xFC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define REG_SHUTDOWN_LOW 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define BIT_SHUTDOWN_ON (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static void ml2f_shutdown(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u64 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) outb(REG_SHUTDOWN_HIGH, EC_SHUTDOWN_IO_PORT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) outb(REG_SHUTDOWN_LOW, EC_SHUTDOWN_IO_PORT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) mmiowb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) val = inb(EC_SHUTDOWN_IO_PORT_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) outb(val & (~BIT_SHUTDOWN_ON), EC_SHUTDOWN_IO_PORT_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) mmiowb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* need enough wait here... how many microseconds needs? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) for (i = 0; i < 0x10000; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) delay();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) outb(val | BIT_SHUTDOWN_ON, EC_SHUTDOWN_IO_PORT_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) mmiowb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void yl2f89_shutdown(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* cpu-gpio0 output low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) LOONGSON_GPIODATA &= ~0x00000001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* cpu-gpio0 as output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) LOONGSON_GPIOIE &= ~0x00000001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) void mach_prepare_reboot(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) switch (mips_machtype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) case MACH_LEMOTE_FL2F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) case MACH_LEMOTE_NAS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) case MACH_LEMOTE_LL2F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) fl2f_reboot();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) case MACH_LEMOTE_ML2F7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ml2f_reboot();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) case MACH_LEMOTE_YL2F89:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) yl2f89_reboot();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) void mach_prepare_shutdown(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) switch (mips_machtype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) case MACH_LEMOTE_FL2F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) case MACH_LEMOTE_NAS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) case MACH_LEMOTE_LL2F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) fl2f_shutdown();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) case MACH_LEMOTE_ML2F7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ml2f_shutdown();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) case MACH_LEMOTE_YL2F89:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) yl2f89_shutdown();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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