^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Fuxin Zhang, zhangfx@lemote.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <loongson.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) static struct resource loongson_pci_mem_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) .name = "pci memory space",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) .start = LOONGSON_PCI_MEM_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) .end = LOONGSON_PCI_MEM_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static struct resource loongson_pci_io_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .name = "pci io space",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .start = LOONGSON_PCI_IO_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .end = IO_SPACE_LIMIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .flags = IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static struct pci_controller loongson_pci_controller = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .pci_ops = &loongson_pci_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .io_resource = &loongson_pci_io_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .mem_resource = &loongson_pci_mem_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .mem_offset = 0x00000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .io_offset = 0x00000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static void __init setup_pcimap(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * local to PCI mapping for CPU accessing PCI space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * CPU address space [256M,448M] is window for accessing pci space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * [<2G] [384M,448M] [320M,384M] [0M,64M]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) LOONGSON_PCIMAP = LOONGSON_PCIMAP_PCIMAP_2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) LOONGSON_PCIMAP_WIN(2, LOONGSON_PCILO2_BASE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) LOONGSON_PCIMAP_WIN(1, LOONGSON_PCILO1_BASE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) LOONGSON_PCIMAP_WIN(0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* size: 256M, burst transmission, pre-fetch enable, 64bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* avoid deadlock of PCI reading/writing lock operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) LOONGSON_PCI_ISR4C = 0xd2000001ul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* can not change gnt to break pci transfer when device's gnt not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) deassert for some broken device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) LOONGSON_PXARB_CFG = 0x00fe0105ul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * set cpu addr window2 to map CPU address space to PCI address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) extern int sbx00_acpi_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static int __init pcibios_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) setup_pcimap();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) loongson_pci_controller.io_map_base = mips_io_port_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) register_pci_controller(&loongson_pci_controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) arch_initcall(pcibios_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags