Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2009 Lemote Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Author: Wu Zhangjin, wuzhangjin@gmail.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <asm/traps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/smp-ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/fw/fw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <loongson.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* Loongson CPU address windows config space base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) unsigned long __maybe_unused _loongson_addrwincfg_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static void __init mips_nmi_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	void *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	extern char except_vec_nmi[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	base = (void *)(CAC_BASE + 0x380);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	memcpy(base, except_vec_nmi, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void __init prom_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	_loongson_addrwincfg_base = (unsigned long)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	fw_init_cmdline();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	prom_init_machtype();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	prom_init_env();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	/* init base address of io space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	set_io_port_base((unsigned long)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	prom_init_memory();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	/*init the uart base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	prom_init_uart_base();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	board_nmi_handler_setup = mips_nmi_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void __init prom_free_prom_memory(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }