Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *  Copyright (C) 2012 John Crispin <john@phrozen.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (C) 2010 Sameer Ahmad, Lantiq GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <lantiq_soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* Bias and regulator Setup Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define DCDC_BIAS_VREG0	0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* Bias and regulator Setup Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define DCDC_BIAS_VREG1	0xb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define dcdc_w8(x, y)	ltq_w8((x), dcdc_membase + (y))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define dcdc_r8(x)	ltq_r8(dcdc_membase + (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static void __iomem *dcdc_membase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static int dcdc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	dcdc_membase = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	if (IS_ERR(dcdc_membase))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		return PTR_ERR(dcdc_membase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	dev_info(&pdev->dev, "Core Voltage : %d mV\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		dcdc_r8(DCDC_BIAS_VREG1) * 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static const struct of_device_id dcdc_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	{ .compatible = "lantiq,dcdc-xrx200" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct platform_driver dcdc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	.probe = dcdc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		.name = "dcdc-xrx200",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		.of_match_table = dcdc_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int __init dcdc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	int ret = platform_driver_register(&dcdc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		pr_info("dcdc: Error registering platform driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) arch_initcall(dcdc_init);