Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2010 John Crispin <john@phrozen.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <lantiq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include "prom.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include "clk.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /* access to the ebu needs to be locked between different drivers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) DEFINE_SPINLOCK(ebu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) EXPORT_SYMBOL_GPL(ebu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * This is needed by the VPE loader code, just set it to 0 and assume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * that the firmware hardcodes this value to something useful.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) unsigned long physical_memsize = 0L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * this struct is filled by the soc specific detection code and holds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * information about the specific soc type, revision and name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static struct ltq_soc_info soc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) const char *get_system_type(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	return soc_info.sys_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) int ltq_soc_type(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	return soc_info.type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) void __init prom_free_prom_memory(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static void __init prom_init_cmdline(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	int argc = fw_arg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	char **argv = (char **) KSEG1ADDR(fw_arg1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	arcs_cmdline[0] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	for (i = 0; i < argc; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		char *p = (char *) KSEG1ADDR(argv[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		if (CPHYSADDR(p) && *p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) void __init plat_mem_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	void *dtb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	ioport_resource.start = IOPORT_RESOURCE_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	ioport_resource.end = IOPORT_RESOURCE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	iomem_resource.start = IOMEM_RESOURCE_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	iomem_resource.end = IOMEM_RESOURCE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	set_io_port_base((unsigned long) KSEG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	if (fw_passed_dtb) /* UHI interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		dtb = (void *)fw_passed_dtb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	else if (__dtb_start != __dtb_end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		dtb = (void *)__dtb_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		panic("no dtb found");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	 * Load the devicetree. This causes the chosen node to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	 * parsed resulting in our memory appearing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	__dt_setup_arch(dtb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) void __init device_tree_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	unflatten_and_copy_device_tree();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) void __init prom_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	/* call the soc specific detetcion code and get it to fill soc_info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	ltq_soc_detect(&soc_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		soc_info.name, soc_info.rev_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	pr_info("SoC: %s\n", soc_info.sys_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	prom_init_cmdline();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #if defined(CONFIG_MIPS_MT_SMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (register_vsmp_smp_ops())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		panic("failed to register_vsmp_smp_ops()");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }