^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * FPU context handling code for KVM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2015 Imagination Technologies Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/fpregdef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/regdef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #undef fp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .set noreorder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .set noat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) LEAF(__kvm_save_fpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .set push
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SET_HARDFLOAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .set fp=64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) mfc0 t0, CP0_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) sll t0, t0, 5 # is Status.FR set?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) bgez t0, 1f # no: skip odd doubles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) sdc1 $f1, VCPU_FPR1(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) sdc1 $f3, VCPU_FPR3(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) sdc1 $f5, VCPU_FPR5(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) sdc1 $f7, VCPU_FPR7(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) sdc1 $f9, VCPU_FPR9(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) sdc1 $f11, VCPU_FPR11(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) sdc1 $f13, VCPU_FPR13(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) sdc1 $f15, VCPU_FPR15(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) sdc1 $f17, VCPU_FPR17(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) sdc1 $f19, VCPU_FPR19(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) sdc1 $f21, VCPU_FPR21(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) sdc1 $f23, VCPU_FPR23(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) sdc1 $f25, VCPU_FPR25(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) sdc1 $f27, VCPU_FPR27(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) sdc1 $f29, VCPU_FPR29(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) sdc1 $f31, VCPU_FPR31(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 1: sdc1 $f0, VCPU_FPR0(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) sdc1 $f2, VCPU_FPR2(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) sdc1 $f4, VCPU_FPR4(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) sdc1 $f6, VCPU_FPR6(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) sdc1 $f8, VCPU_FPR8(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) sdc1 $f10, VCPU_FPR10(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) sdc1 $f12, VCPU_FPR12(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) sdc1 $f14, VCPU_FPR14(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) sdc1 $f16, VCPU_FPR16(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) sdc1 $f18, VCPU_FPR18(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) sdc1 $f20, VCPU_FPR20(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) sdc1 $f22, VCPU_FPR22(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) sdc1 $f24, VCPU_FPR24(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) sdc1 $f26, VCPU_FPR26(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) sdc1 $f28, VCPU_FPR28(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) jr ra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) sdc1 $f30, VCPU_FPR30(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .set pop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) END(__kvm_save_fpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) LEAF(__kvm_restore_fpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .set push
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) SET_HARDFLOAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .set fp=64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) mfc0 t0, CP0_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) sll t0, t0, 5 # is Status.FR set?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) bgez t0, 1f # no: skip odd doubles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ldc1 $f1, VCPU_FPR1(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ldc1 $f3, VCPU_FPR3(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ldc1 $f5, VCPU_FPR5(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ldc1 $f7, VCPU_FPR7(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ldc1 $f9, VCPU_FPR9(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ldc1 $f11, VCPU_FPR11(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ldc1 $f13, VCPU_FPR13(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ldc1 $f15, VCPU_FPR15(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ldc1 $f17, VCPU_FPR17(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ldc1 $f19, VCPU_FPR19(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ldc1 $f21, VCPU_FPR21(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ldc1 $f23, VCPU_FPR23(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ldc1 $f25, VCPU_FPR25(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ldc1 $f27, VCPU_FPR27(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ldc1 $f29, VCPU_FPR29(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ldc1 $f31, VCPU_FPR31(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 1: ldc1 $f0, VCPU_FPR0(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ldc1 $f2, VCPU_FPR2(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ldc1 $f4, VCPU_FPR4(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ldc1 $f6, VCPU_FPR6(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ldc1 $f8, VCPU_FPR8(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ldc1 $f10, VCPU_FPR10(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ldc1 $f12, VCPU_FPR12(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ldc1 $f14, VCPU_FPR14(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ldc1 $f16, VCPU_FPR16(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ldc1 $f18, VCPU_FPR18(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) ldc1 $f20, VCPU_FPR20(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ldc1 $f22, VCPU_FPR22(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ldc1 $f24, VCPU_FPR24(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ldc1 $f26, VCPU_FPR26(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ldc1 $f28, VCPU_FPR28(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) jr ra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ldc1 $f30, VCPU_FPR30(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .set pop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) END(__kvm_restore_fpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) LEAF(__kvm_restore_fcsr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .set push
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) SET_HARDFLOAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) lw t0, VCPU_FCR31(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * The ctc1 must stay at this offset in __kvm_restore_fcsr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * See kvm_mips_csr_die_notify() which handles t0 containing a value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * which triggers an FP Exception, which must be stepped over and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * ignored since the set cause bits must remain there for the guest.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ctc1 t0, fcr31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) jr ra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .set pop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) END(__kvm_restore_fcsr)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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