^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2000, 2001 Kanoj Sarcar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2000, 2001 Ralf Baechle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/threads.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/timex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/sched/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/cpumask.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/ftrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/ginvt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/idle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/r4k-timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/mips-cps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/mmu_context.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/maar.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP]; /* Map physical to logical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) EXPORT_SYMBOL(__cpu_number_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) EXPORT_SYMBOL(__cpu_logical_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* Number of TCs (or siblings in Intel speak) per CPU core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int smp_num_siblings = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) EXPORT_SYMBOL(smp_num_siblings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* representing the TCs (or siblings in Intel speak) of each logical CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) EXPORT_SYMBOL(cpu_sibling_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* representing the core map of multi-core chips of each logical CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) EXPORT_SYMBOL(cpu_core_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static DECLARE_COMPLETION(cpu_starting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static DECLARE_COMPLETION(cpu_running);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * A logcal cpu mask containing only one VPE per core to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * reduce the number of IPIs on large MT systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) cpumask_t cpu_foreign_map[NR_CPUS] __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) EXPORT_SYMBOL(cpu_foreign_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* representing cpus for which sibling maps can be computed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static cpumask_t cpu_sibling_setup_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* representing cpus for which core maps can be computed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static cpumask_t cpu_core_setup_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) cpumask_t cpu_coherent_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #ifdef CONFIG_GENERIC_IRQ_IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static struct irq_desc *call_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static struct irq_desc *sched_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static inline void set_cpu_sibling_map(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) cpumask_set_cpu(cpu, &cpu_sibling_setup_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (smp_num_siblings > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) for_each_cpu(i, &cpu_sibling_setup_map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (cpus_are_siblings(cpu, i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) cpumask_set_cpu(cpu, &cpu_sibling_map[cpu]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static inline void set_cpu_core_map(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) cpumask_set_cpu(cpu, &cpu_core_setup_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) for_each_cpu(i, &cpu_core_setup_map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (cpu_data[cpu].package == cpu_data[i].package) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) cpumask_set_cpu(i, &cpu_core_map[cpu]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) cpumask_set_cpu(cpu, &cpu_core_map[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * Calculate a new cpu_foreign_map mask whenever a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * new cpu appears or disappears.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void calculate_cpu_foreign_map(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int i, k, core_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) cpumask_t temp_foreign_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Re-calculate the mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) cpumask_clear(&temp_foreign_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) for_each_online_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) core_present = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) for_each_cpu(k, &temp_foreign_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (cpus_are_siblings(i, k))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) core_present = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (!core_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) cpumask_set_cpu(i, &temp_foreign_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) for_each_online_cpu(i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) cpumask_andnot(&cpu_foreign_map[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) &temp_foreign_map, &cpu_sibling_map[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) const struct plat_smp_ops *mp_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) EXPORT_SYMBOL(mp_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) void register_smp_ops(const struct plat_smp_ops *ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (mp_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) printk(KERN_WARNING "Overriding previously set SMP ops\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) mp_ops = ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #ifdef CONFIG_GENERIC_IRQ_IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) void mips_smp_send_ipi_single(int cpu, unsigned int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) mips_smp_send_ipi_mask(cpumask_of(cpu), action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) unsigned int core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) switch (action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) case SMP_CALL_FUNCTION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) __ipi_send_mask(call_desc, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) case SMP_RESCHEDULE_YOURSELF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) __ipi_send_mask(sched_desc, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (mips_cpc_present()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) for_each_cpu(cpu, mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (cpus_are_siblings(cpu, smp_processor_id()))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) core = cpu_core(&cpu_data[cpu]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) mips_cm_lock_other_cpu(cpu, CM_GCR_Cx_OTHER_BLOCK_LOCAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) mips_cpc_lock_other(core);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) mips_cpc_unlock_other();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) mips_cm_unlock_other();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) scheduler_ipi();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) generic_smp_call_function_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static void smp_ipi_init_one(unsigned int virq, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) irq_handler_t handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) irq_set_handler(virq, handle_percpu_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ret = request_irq(virq, handler, IRQF_PERCPU, name, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) BUG_ON(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static unsigned int call_virq, sched_virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) int mips_smp_ipi_allocate(const struct cpumask *mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) struct irq_domain *ipidomain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) node = of_irq_find_parent(of_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * Some platforms have half DT setup. So if we found irq node but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * didn't find an ipidomain, try to search for one that is not in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * DT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (node && !ipidomain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * There are systems which use IPI IRQ domains, but only have one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * registered when some runtime condition is met. For example a Malta
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * kernel may include support for GIC & CPU interrupt controller IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * IRQ domains, but if run on a system with no GIC & no MT ASE then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * neither will be supported or registered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * We only have a problem if we're actually using multiple CPUs so fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * loudly if that is the case. Otherwise simply return, skipping IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * setup, if we're running with only a single CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (!ipidomain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) BUG_ON(num_present_cpus() > 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) virq = irq_reserve_ipi(ipidomain, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) BUG_ON(!virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (!call_virq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) call_virq = virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) virq = irq_reserve_ipi(ipidomain, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) BUG_ON(!virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (!sched_virq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) sched_virq = virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (irq_domain_is_ipi_per_cpu(ipidomain)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) for_each_cpu(cpu, mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) smp_ipi_init_one(call_virq + cpu, "IPI call",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ipi_call_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) smp_ipi_init_one(sched_virq + cpu, "IPI resched",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ipi_resched_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) smp_ipi_init_one(call_virq, "IPI call", ipi_call_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) smp_ipi_init_one(sched_virq, "IPI resched",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ipi_resched_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) int mips_smp_ipi_free(const struct cpumask *mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct irq_domain *ipidomain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) node = of_irq_find_parent(of_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * Some platforms have half DT setup. So if we found irq node but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * didn't find an ipidomain, try to search for one that is not in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * DT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (node && !ipidomain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) BUG_ON(!ipidomain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (irq_domain_is_ipi_per_cpu(ipidomain)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) for_each_cpu(cpu, mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) free_irq(call_virq + cpu, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) free_irq(sched_virq + cpu, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) irq_destroy_ipi(call_virq, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) irq_destroy_ipi(sched_virq, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static int __init mips_smp_ipi_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (num_possible_cpus() == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) mips_smp_ipi_allocate(cpu_possible_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) call_desc = irq_to_desc(call_virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) sched_desc = irq_to_desc(sched_virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) early_initcall(mips_smp_ipi_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * First C code run on the secondary CPUs after being started up by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * the master.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) asmlinkage void start_secondary(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) cpu_probe();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) per_cpu_trap_init(false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) mips_clockevent_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) mp_ops->init_secondary();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) cpu_report();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) maar_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * XXX parity protection should be folded in here when it's converted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * to an option instead of something based on .cputype
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) calibrate_delay();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) cpu = smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) cpu_data[cpu].udelay_val = loops_per_jiffy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) set_cpu_sibling_map(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) set_cpu_core_map(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) cpumask_set_cpu(cpu, &cpu_coherent_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) notify_cpu_starting(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* Notify boot CPU that we're starting & ready to sync counters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) complete(&cpu_starting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) synchronise_count_slave(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /* The CPU is running and counters synchronised, now mark it online */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) set_cpu_online(cpu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) calculate_cpu_foreign_map();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * Notify boot CPU that we're up & online and it can safely return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * from __cpu_up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) complete(&cpu_running);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * irq will be enabled in ->smp_finish(), enabling it too early
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * is dangerous.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) WARN_ON_ONCE(!irqs_disabled());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) mp_ops->smp_finish();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static void stop_this_cpu(void *dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * Remove this CPU:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) set_cpu_online(smp_processor_id(), false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) calculate_cpu_foreign_map();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) while (1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) void smp_send_stop(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) smp_call_function(stop_this_cpu, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) void __init smp_cpus_done(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* called from main before smp_init() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) void __init smp_prepare_cpus(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) init_new_context(current, &init_mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) current_thread_info()->cpu = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) mp_ops->prepare_cpus(max_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) set_cpu_sibling_map(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) set_cpu_core_map(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) calculate_cpu_foreign_map();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #ifndef CONFIG_HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) init_cpu_present(cpu_possible_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) cpumask_copy(&cpu_coherent_mask, cpu_possible_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /* preload SMP state for boot cpu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) void smp_prepare_boot_cpu(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (mp_ops->prepare_boot_cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) mp_ops->prepare_boot_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) set_cpu_possible(0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) set_cpu_online(0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) int __cpu_up(unsigned int cpu, struct task_struct *tidle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) err = mp_ops->boot_secondary(cpu, tidle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /* Wait for CPU to start and be ready to sync counters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (!wait_for_completion_timeout(&cpu_starting,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) msecs_to_jiffies(1000))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) pr_crit("CPU%u: failed to start\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) synchronise_count_master(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /* Wait for CPU to finish startup & mark itself online before return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) wait_for_completion(&cpu_running);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /* Not really SMP stuff ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) int setup_profiling_timer(unsigned int multiplier)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static void flush_tlb_all_ipi(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) local_flush_tlb_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) void flush_tlb_all(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (cpu_has_mmid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) htw_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) ginvt_full();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) sync_ginv();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) instruction_hazard();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) htw_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) on_each_cpu(flush_tlb_all_ipi, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static void flush_tlb_mm_ipi(void *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) drop_mmu_context((struct mm_struct *)mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * Special Variant of smp_call_function for use by TLB functions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) * o No return value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) * o collapses to normal function call on UP kernels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) * o collapses to normal function call on systems with a single shared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) * primary cache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) smp_call_function(func, info, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) smp_on_other_tlbs(func, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) func(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) * The following tlb flush calls are invoked when old translations are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * being torn down, or pte attributes are changing. For single threaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * address spaces, a new context is obtained on the current cpu, and tlb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) * context on other cpus are invalidated to force a new context allocation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * at switch_mm time, should the mm ever be used on other cpus. For
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) * multithreaded address spaces, intercpu interrupts have to be sent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * Another case where intercpu interrupts are required is when the target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * mm might be active on another cpu (eg debuggers doing the flushes on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) * behalf of debugees, kswapd stealing pages from another process etc).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) * Kanoj 07/00.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) void flush_tlb_mm(struct mm_struct *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (cpu_has_mmid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * No need to worry about other CPUs - the ginvt in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) * drop_mmu_context() will be globalized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) } else if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) for_each_online_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (cpu != smp_processor_id() && cpu_context(cpu, mm))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) set_cpu_context(cpu, mm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) drop_mmu_context(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) struct flush_tlb_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) struct vm_area_struct *vma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) unsigned long addr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) unsigned long addr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static void flush_tlb_range_ipi(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) struct flush_tlb_data *fd = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) struct mm_struct *mm = vma->vm_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) unsigned long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) u32 old_mmid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (cpu_has_mmid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) htw_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) old_mmid = read_c0_memorymapid();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) write_c0_memorymapid(cpu_asid(0, mm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) mtc0_tlbw_hazard();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) addr = round_down(start, PAGE_SIZE * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) end = round_up(end, PAGE_SIZE * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) ginvt_va_mmid(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) sync_ginv();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) addr += PAGE_SIZE * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) } while (addr < end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) write_c0_memorymapid(old_mmid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) instruction_hazard();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) htw_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) } else if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) struct flush_tlb_data fd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) .vma = vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .addr1 = start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .addr2 = end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) local_flush_tlb_range(vma, start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) int exec = vma->vm_flags & VM_EXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) for_each_online_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * flush_cache_range() will only fully flush icache if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * the VMA is executable, otherwise we must invalidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * ASID without it appearing to has_valid_asid() as if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) * mm has been completely unused by that CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (cpu != smp_processor_id() && cpu_context(cpu, mm))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) set_cpu_context(cpu, mm, !exec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) local_flush_tlb_range(vma, start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static void flush_tlb_kernel_range_ipi(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) struct flush_tlb_data *fd = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) void flush_tlb_kernel_range(unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) struct flush_tlb_data fd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .addr1 = start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .addr2 = end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) static void flush_tlb_page_ipi(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) struct flush_tlb_data *fd = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) local_flush_tlb_page(fd->vma, fd->addr1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) u32 old_mmid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (cpu_has_mmid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) htw_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) old_mmid = read_c0_memorymapid();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) write_c0_memorymapid(cpu_asid(0, vma->vm_mm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) mtc0_tlbw_hazard();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) ginvt_va_mmid(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) sync_ginv();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) write_c0_memorymapid(old_mmid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) instruction_hazard();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) htw_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) } else if ((atomic_read(&vma->vm_mm->mm_users) != 1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) (current->mm != vma->vm_mm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) struct flush_tlb_data fd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .vma = vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .addr1 = page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) local_flush_tlb_page(vma, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) for_each_online_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * flush_cache_page() only does partial flushes, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) * invalidate ASID without it appearing to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) * has_valid_asid() as if mm has been completely unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) * by that CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) set_cpu_context(cpu, vma->vm_mm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) local_flush_tlb_page(vma, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static void flush_tlb_one_ipi(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) unsigned long vaddr = (unsigned long) info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) local_flush_tlb_one(vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) void flush_tlb_one(unsigned long vaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) EXPORT_SYMBOL(flush_tlb_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) EXPORT_SYMBOL(flush_tlb_one);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) static DEFINE_PER_CPU(call_single_data_t, tick_broadcast_csd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) void tick_broadcast(const struct cpumask *mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) call_single_data_t *csd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) for_each_cpu(cpu, mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) csd = &per_cpu(tick_broadcast_csd, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) smp_call_function_single_async(cpu, csd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) static void tick_broadcast_callee(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) tick_receive_broadcast();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static int __init tick_broadcast_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) call_single_data_t *csd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) for (cpu = 0; cpu < NR_CPUS; cpu++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) csd = &per_cpu(tick_broadcast_csd, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) csd->func = tick_broadcast_callee;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) early_initcall(tick_broadcast_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) #endif /* CONFIG_GENERIC_CLOCKEVENTS_BROADCAST */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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