^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2013 Imagination Technologies Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/mips_mt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/vpe.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/rtlx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static int major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static void rtlx_interrupt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct rtlx_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct rtlx_info **p = vpe_get_shared(aprp_cpu_index());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) if (p == NULL || *p == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) info = *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (info->ap_int_pending == 1 && smp_processor_id() == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) for (i = 0; i < RTLX_CHANNELS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) wake_up(&channel_wqs[i].lx_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) wake_up(&channel_wqs[i].rt_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) info->ap_int_pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void _interrupt_sp(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) smp_send_reschedule(aprp_cpu_index());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int __init rtlx_module_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (!cpu_has_mipsmt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) pr_warn("VPE loader: not a MIPS MT capable processor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (num_possible_cpus() - aprp_cpu_index() < 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) pr_warn("No TCs reserved for AP/SP, not initializing RTLX.\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) "Pass maxcpus=<n> argument as kernel argument\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) major = register_chrdev(0, RTLX_MODULE_NAME, &rtlx_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (major < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) pr_err("rtlx_module_init: unable to register device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* initialise the wait queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) for (i = 0; i < RTLX_CHANNELS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) init_waitqueue_head(&channel_wqs[i].rt_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) init_waitqueue_head(&channel_wqs[i].lx_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) atomic_set(&channel_wqs[i].in_open, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) mutex_init(&channel_wqs[i].mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) dev = device_create(mt_class, NULL, MKDEV(major, i), NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) "%s%d", RTLX_MODULE_NAME, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (IS_ERR(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) while (i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) device_destroy(mt_class, MKDEV(major, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) err = PTR_ERR(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) goto out_chrdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* set up notifiers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) rtlx_notify.start = rtlx_starting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) rtlx_notify.stop = rtlx_stopping;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) vpe_notify(aprp_cpu_index(), &rtlx_notify);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (cpu_has_vint) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) aprp_hook = rtlx_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pr_err("APRP RTLX init on non-vectored-interrupt processor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) goto out_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) out_class:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) for (i = 0; i < RTLX_CHANNELS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) device_destroy(mt_class, MKDEV(major, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) out_chrdev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) unregister_chrdev(major, RTLX_MODULE_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void __exit rtlx_module_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) for (i = 0; i < RTLX_CHANNELS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) device_destroy(mt_class, MKDEV(major, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unregister_chrdev(major, RTLX_MODULE_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) aprp_hook = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags