^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 1994, 1995, 1996, 1998, 1999, 2002, 2003 Ralf Baechle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1994, 1995, 1996, by Andreas Busse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 1999 Silicon Graphics, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2000 MIPS Technologies, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * written by Carsten Langgaard, carstenl@mips.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/cachectl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/regdef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/stackframe.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/asmmacro.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * task_struct *resume(task_struct *prev, task_struct *next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * struct thread_info *next_ti)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .align 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) LEAF(resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) mfc0 t1, CP0_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) LONG_S t1, THREAD_STATUS(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) cpu_save_nonscratch a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) LONG_S ra, THREAD_REG31(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PTR_LA t8, __stack_chk_guard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) LONG_L t9, TASK_STACK_CANARY(a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) LONG_S t9, 0(t8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * The order of restoring the registers takes care of the race
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * updating $28, $29 and kernelsp without disabling ints.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) move $28, a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) cpu_restore_nonscratch a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) PTR_ADDU t0, $28, _THREAD_SIZE - 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) set_saved_sp t0, t1, t2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) mfc0 t1, CP0_STATUS /* Do we really need this? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) li a3, 0xff01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) and t1, a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) LONG_L a2, THREAD_STATUS(a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) nor a3, $0, a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) and a2, a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) or a2, t1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mtc0 a2, CP0_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) move v0, a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) jr ra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) END(resume)