Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * r2300_switch.S: R2300 specific task switching code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 1994, 1995, 1996 by Andreas Busse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Multi-cpu abstraction and macros for easier reading:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Further modifications to make this work:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * Copyright (c) 1998-2000 Harald Koerfgen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/cachectl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/fpregdef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/regdef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/stackframe.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/asmmacro.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	.set	mips1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	.align	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * task_struct *resume(task_struct *prev, task_struct *next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  *		       struct thread_info *next_ti)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) LEAF(resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	mfc0	t1, CP0_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	sw	t1, THREAD_STATUS(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	cpu_save_nonscratch a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	sw	ra, THREAD_REG31(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	PTR_LA	t8, __stack_chk_guard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	LONG_L	t9, TASK_STACK_CANARY(a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	LONG_S	t9, 0(t8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	 * The order of restoring the registers takes care of the race
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	 * updating $28, $29 and kernelsp without disabling ints.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	move	$28, a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	cpu_restore_nonscratch a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	addiu	t1, $28, _THREAD_SIZE - 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	sw	t1, kernelsp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	mfc0	t1, CP0_STATUS		/* Do we really need this? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	li	a3, 0xff01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	and	t1, a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	lw	a2, THREAD_STATUS(a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	nor	a3, $0, a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	and	a2, a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	or	a2, t1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	mtc0	a2, CP0_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	move	v0, a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	jr	ra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	END(resume)