Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 1992 Ross Biro
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 1996 David S. Miller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Copyright (C) 1999 MIPS Technologies, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * Copyright (C) 2000 Ulf Carlsson
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * binaries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/compiler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/sched/task_stack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/security.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <asm/dsp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <asm/fpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <asm/mipsmtregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <asm/reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <asm/syscall.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * Tracing a 32-bit process with a 64-bit strace and vice versa will not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * work.  I don't know how to fix this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 			compat_ulong_t caddr, compat_ulong_t cdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	int addr = caddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	int data = cdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	switch (request) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	 * Read 4 bytes of the other process' storage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	 *  data is a pointer specifying where the user wants the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	 *	4 bytes copied into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	 *  addr is a pointer in the user's storage that contains an 8 byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	 *	address in the other process of the 4 bytes that is to be read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	 * (this is run in a 32-bit process looking at a 64-bit process)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	 * when I and D space are separate, these will need to be fixed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	case PTRACE_PEEKTEXT_3264:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	case PTRACE_PEEKDATA_3264: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		int copied;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		u32 __user * addrOthers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		/* Get the addr in the other process that we want to read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		copied = ptrace_access_vm(child, (u64)addrOthers, &tmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 				sizeof(tmp), FOLL_FORCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		if (copied != sizeof(tmp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		ret = put_user(tmp, (u32 __user *) (unsigned long) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* Read the word at location addr in the USER area. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	case PTRACE_PEEKUSR: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		struct pt_regs *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		unsigned int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		regs = task_pt_regs(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		ret = 0;  /* Default return value. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		switch (addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		case 0 ... 31:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			tmp = regs->regs[addr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #ifdef CONFIG_MIPS_FP_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		case FPR_BASE ... FPR_BASE + 31: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			union fpureg *fregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			if (!tsk_used_math(child)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				/* FP not yet used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 				tmp = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			fregs = get_fpu_regs(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 				 * The odd registers are actually the high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 				 * order bits of the values stored in the even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 				 * registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 				tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 						addr & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		case FPC_CSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			tmp = child->thread.fpu.fcr31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		case FPC_EIR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			/* implementation / version register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			tmp = boot_cpu_data.fpu_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #endif /* CONFIG_MIPS_FP_SUPPORT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		case PC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			tmp = regs->cp0_epc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		case CAUSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			tmp = regs->cp0_cause;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		case BADVADDR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			tmp = regs->cp0_badvaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		case MMHI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			tmp = regs->hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		case MMLO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			tmp = regs->lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		case DSP_BASE ... DSP_BASE + 5: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			dspreg_t *dregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			if (!cpu_has_dsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 				tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 				ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			dregs = __get_dsp_regs(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			tmp = dregs[addr - DSP_BASE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		case DSP_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			if (!cpu_has_dsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 				tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 				ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			tmp = child->thread.dsp.dspcontrol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		ret = put_user(tmp, (unsigned __user *) (unsigned long) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	 * Write 4 bytes into the other process' storage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	 *  data is the 4 bytes that the user wants written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	 *  addr is a pointer in the user's storage that contains an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	 *	8 byte address in the other process where the 4 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	 *	that is to be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	 * (this is run in a 32-bit process looking at a 64-bit process)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	 * when I and D space are separate, these will need to be fixed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	case PTRACE_POKETEXT_3264:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	case PTRACE_POKEDATA_3264: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		u32 __user * addrOthers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		/* Get the addr in the other process that we want to write into */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		if (ptrace_access_vm(child, (u64)addrOthers, &data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 					sizeof(data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 					FOLL_FORCE | FOLL_WRITE) == sizeof(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	case PTRACE_POKEUSR: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		struct pt_regs *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		regs = task_pt_regs(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		switch (addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		case 0 ... 31:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			regs->regs[addr] = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			/* System call number may have been changed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 			if (addr == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				mips_syscall_update_nr(child, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			else if (addr == 4 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 				 mips_syscall_is_indirect(child, regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 				mips_syscall_update_nr(child, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #ifdef CONFIG_MIPS_FP_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		case FPR_BASE ... FPR_BASE + 31: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			union fpureg *fregs = get_fpu_regs(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 			if (!tsk_used_math(child)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 				/* FP not yet used  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 				memset(&child->thread.fpu, ~0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 				       sizeof(child->thread.fpu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 				child->thread.fpu.fcr31 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 				/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 				 * The odd registers are actually the high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 				 * order bits of the values stored in the even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 				 * registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 				 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 				set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 					  addr & 1, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 			set_fpr64(&fregs[addr - FPR_BASE], 0, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		case FPC_CSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 			child->thread.fpu.fcr31 = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #endif /* CONFIG_MIPS_FP_SUPPORT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		case PC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			regs->cp0_epc = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		case MMHI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			regs->hi = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		case MMLO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			regs->lo = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		case DSP_BASE ... DSP_BASE + 5: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			dspreg_t *dregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 			if (!cpu_has_dsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 				ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			dregs = __get_dsp_regs(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			dregs[addr - DSP_BASE] = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		case DSP_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			if (!cpu_has_dsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 				ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			child->thread.dsp.dspcontrol = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			/* The rest are not allowed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	case PTRACE_GETREGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		ret = ptrace_getregs(child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 				(struct user_pt_regs __user *) (__u64) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	case PTRACE_SETREGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		ret = ptrace_setregs(child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 				(struct user_pt_regs __user *) (__u64) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #ifdef CONFIG_MIPS_FP_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	case PTRACE_GETFPREGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	case PTRACE_SETFPREGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	case PTRACE_GET_THREAD_AREA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		ret = put_user(task_thread_info(child)->tp_value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 				(unsigned int __user *) (unsigned long) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	case PTRACE_GET_THREAD_AREA_3264:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		ret = put_user(task_thread_info(child)->tp_value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 				(unsigned long __user *) (unsigned long) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	case PTRACE_GET_WATCH_REGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		ret = ptrace_get_watch_regs(child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			(struct pt_watch_regs __user *) (unsigned long) addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	case PTRACE_SET_WATCH_REGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		ret = ptrace_set_watch_regs(child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			(struct pt_watch_regs __user *) (unsigned long) addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		ret = compat_ptrace_request(child, request, addr, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }