Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 2004 Thiemo Seufer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (C) 2013  Imagination Technologies Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/sched/debug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/sched/task.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/sched/task_stack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/tick.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/unistd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/mman.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/personality.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/sys.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/kallsyms.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/prctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/nmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <asm/abi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <asm/asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <asm/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <asm/dsemul.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #include <asm/dsp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #include <asm/fpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #include <asm/mips-cps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #include <asm/msa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #include <asm/reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #include <asm/elf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #include <asm/isadep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #include <asm/inst.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #include <asm/stacktrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #include <asm/irq_regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #include <asm/exec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #ifdef CONFIG_HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) void arch_cpu_idle_dead(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	play_dead();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) asmlinkage void ret_from_fork(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) asmlinkage void ret_from_kernel_thread(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	unsigned long status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	/* New thread loses kernel privileges. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_CU2|ST0_FR|KU_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	status |= KU_USER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	regs->cp0_status = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	lose_fpu(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	clear_thread_flag(TIF_MSA_CTX_LIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	clear_used_math();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #ifdef CONFIG_MIPS_FP_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	init_dsp();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	regs->cp0_epc = pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	regs->regs[29] = sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) void exit_thread(struct task_struct *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	 * User threads may have allocated a delay slot emulation frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	 * If so, clean up that allocation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	if (!(current->flags & PF_KTHREAD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		dsemul_thread_cleanup(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	 * Save any process state which is live in hardware registers to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	 * parent context prior to duplication. This prevents the new child
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	 * state becoming stale if the parent is preempted before copy_thread()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	 * gets a chance to save the parent's live hardware registers to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	 * child context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (is_msa_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		save_msa(current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	else if (is_fpu_owner())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		_save_fp(current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	save_dsp(current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	*dst = *src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)  * Copy architecture-specific thread state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int copy_thread(unsigned long clone_flags, unsigned long usp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		unsigned long kthread_arg, struct task_struct *p,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		unsigned long tls)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct thread_info *ti = task_thread_info(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct pt_regs *childregs, *regs = current_pt_regs();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	unsigned long childksp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/* set up new TSS. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	childregs = (struct pt_regs *) childksp - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	/*  Put the stack after the struct pt_regs.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	childksp = (unsigned long) childregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	p->thread.cp0_status = (read_c0_status() & ~(ST0_CU2|ST0_CU1)) | ST0_KERNEL_CUMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (unlikely(p->flags & PF_KTHREAD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		/* kernel thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		unsigned long status = p->thread.cp0_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		memset(childregs, 0, sizeof(struct pt_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		ti->addr_limit = KERNEL_DS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		p->thread.reg16 = usp; /* fn */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		p->thread.reg17 = kthread_arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		p->thread.reg29 = childksp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			 ((status & (ST0_KUC | ST0_IEC)) << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		status |= ST0_EXL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		childregs->cp0_status = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	/* user thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	*childregs = *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	childregs->regs[7] = 0; /* Clear error flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	childregs->regs[2] = 0; /* Child gets zero as return value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (usp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		childregs->regs[29] = usp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	ti->addr_limit = USER_DS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	p->thread.reg29 = (unsigned long) childregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	p->thread.reg31 = (unsigned long) ret_from_fork;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	 * New tasks lose permission to use the fpu. This accelerates context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	 * switching for most programs since they don't use the fpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	clear_tsk_thread_flag(p, TIF_USEDFPU);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	clear_tsk_thread_flag(p, TIF_USEDMSA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #ifdef CONFIG_MIPS_MT_FPAFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	clear_tsk_thread_flag(p, TIF_FPUBOUND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #endif /* CONFIG_MIPS_MT_FPAFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #ifdef CONFIG_MIPS_FP_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	if (clone_flags & CLONE_SETTLS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		ti->tp_value = tls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #ifdef CONFIG_STACKPROTECTOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #include <linux/stackprotector.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) unsigned long __stack_chk_guard __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) EXPORT_SYMBOL(__stack_chk_guard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct mips_frame_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	void		*func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	unsigned long	func_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	int		frame_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	int		pc_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define J_TARGET(pc,target)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		(((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #ifdef CONFIG_CPU_MICROMIPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	 * swsp ra,offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	 * swm16 reglist,offset(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	 * swm32 reglist,offset(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	 * sw32 ra,offset(sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	 * jradiussp - NOT SUPPORTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	 * microMIPS is way more fun...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (mm_insn_16bit(ip->word >> 16)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		switch (ip->mm16_r5_format.opcode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		case mm_swsp16_op:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			if (ip->mm16_r5_format.rt != 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			*poff = ip->mm16_r5_format.imm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			*poff = (*poff << 2) / sizeof(ulong);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		case mm_pool16c_op:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			switch (ip->mm16_m_format.func) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			case mm_swm16_op:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 				*poff = ip->mm16_m_format.imm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 				*poff += 1 + ip->mm16_m_format.rlist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 				*poff = (*poff << 2) / sizeof(ulong);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 				return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	switch (ip->i_format.opcode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	case mm_sw32_op:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		if (ip->i_format.rs != 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		if (ip->i_format.rt != 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		*poff = ip->i_format.simmediate / sizeof(ulong);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	case mm_pool32b_op:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		switch (ip->mm_m_format.func) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		case mm_swm32_func:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 			if (ip->mm_m_format.rd < 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			if (ip->mm_m_format.base != 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			*poff = ip->mm_m_format.simmediate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			*poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			*poff /= sizeof(ulong);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	/* sw / sd $ra, offset($sp) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		ip->i_format.rs == 29 && ip->i_format.rt == 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		*poff = ip->i_format.simmediate / sizeof(ulong);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #ifdef CONFIG_CPU_LOONGSON64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	if ((ip->loongson3_lswc2_format.opcode == swc2_op) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		      (ip->loongson3_lswc2_format.ls == 1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		      (ip->loongson3_lswc2_format.fr == 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		      (ip->loongson3_lswc2_format.base == 29)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		if (ip->loongson3_lswc2_format.rt == 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 			*poff = ip->loongson3_lswc2_format.offset << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		if (ip->loongson3_lswc2_format.rq == 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 			*poff = (ip->loongson3_lswc2_format.offset << 1) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static inline int is_jump_ins(union mips_instruction *ip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #ifdef CONFIG_CPU_MICROMIPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	 * jr16,jrc,jalr16,jalr16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	 * jal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	 * jraddiusp - NOT SUPPORTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	 * microMIPS is kind of more fun...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	if (mm_insn_16bit(ip->word >> 16)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		    (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	if (ip->j_format.opcode == mm_j32_op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	if (ip->j_format.opcode == mm_jal32_op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	if (ip->r_format.opcode != mm_pool32a_op ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 			ip->r_format.func != mm_pool32axf_op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	if (ip->j_format.opcode == j_op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	if (ip->j_format.opcode == jal_op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	if (ip->r_format.opcode != spec_op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static inline int is_sp_move_ins(union mips_instruction *ip, int *frame_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #ifdef CONFIG_CPU_MICROMIPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	unsigned short tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	 * addiusp -imm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	 * addius5 sp,-imm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	 * addiu32 sp,sp,-imm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	 * jradiussp - NOT SUPPORTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	 * microMIPS is not more fun...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	if (mm_insn_16bit(ip->word >> 16)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		if (ip->mm16_r3_format.opcode == mm_pool16d_op &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		    ip->mm16_r3_format.simmediate & mm_addiusp_func) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 			tmp = ip->mm_b0_format.simmediate >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 			tmp = ((tmp & 0x1ff) ^ 0x100) - 0x100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 			if ((tmp + 2) < 4) /* 0x0,0x1,0x1fe,0x1ff are special */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 				tmp ^= 0x100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 			*frame_size = -(signed short)(tmp << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		if (ip->mm16_r5_format.opcode == mm_pool16d_op &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		    ip->mm16_r5_format.rt == 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			tmp = ip->mm16_r5_format.imm >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 			*frame_size = -(signed short)(tmp & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	if (ip->mm_i_format.opcode == mm_addiu32_op &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	    ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		*frame_size = -ip->i_format.simmediate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	/* addiu/daddiu sp,sp,-imm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	if (ip->i_format.opcode == addiu_op ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	    ip->i_format.opcode == daddiu_op) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		*frame_size = -ip->i_format.simmediate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static int get_frame_info(struct mips_frame_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	union mips_instruction insn, *ip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	const unsigned int max_insns = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	unsigned int last_insn_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	bool saw_jump = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	info->pc_offset = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	info->frame_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	ip = (void *)msk_isa16_mode((ulong)info->func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	if (!ip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	for (i = 0; i < max_insns; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 		ip = (void *)ip + last_insn_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 			insn.word = ip->halfword[0] << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 			last_insn_size = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 		} else if (is_mmips) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 			insn.word = ip->halfword[0] << 16 | ip->halfword[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 			last_insn_size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 			insn.word = ip->word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 			last_insn_size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 		if (!info->frame_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 			is_sp_move_ins(&insn, &info->frame_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		} else if (!saw_jump && is_jump_ins(ip)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 			 * If we see a jump instruction, we are finished
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 			 * with the frame save.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 			 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 			 * Some functions can have a shortcut return at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 			 * the beginning of the function, so don't start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 			 * looking for jump instruction until we see the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 			 * frame setup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 			 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 			 * The RA save instruction can get put into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 			 * delay slot of the jump instruction, so look
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 			 * at the next instruction, too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 			saw_jump = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		if (info->pc_offset == -1 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 		    is_ra_save_ins(&insn, &info->pc_offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 		if (saw_jump)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	if (info->frame_size && info->pc_offset >= 0) /* nested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	if (info->pc_offset < 0) /* leaf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	/* prologue seems bogus... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static struct mips_frame_info schedule_mfi __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #ifdef CONFIG_KALLSYMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static unsigned long get___schedule_addr(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	return kallsyms_lookup_name("__schedule");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static unsigned long get___schedule_addr(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	union mips_instruction *ip = (void *)schedule;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	int max_insns = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	for (i = 0; i < max_insns; i++, ip++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		if (ip->j_format.opcode == j_op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 			return J_TARGET(ip, ip->j_format.target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static int __init frame_info_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	unsigned long size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #ifdef CONFIG_KALLSYMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	unsigned long ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	unsigned long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	addr = get___schedule_addr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	if (!addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		addr = (unsigned long)schedule;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #ifdef CONFIG_KALLSYMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	kallsyms_lookup_size_offset(addr, &size, &ofs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	schedule_mfi.func = (void *)addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	schedule_mfi.func_size = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	get_frame_info(&schedule_mfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	 * Without schedule() frame info, result given by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	 * thread_saved_pc() and get_wchan() are not reliable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	if (schedule_mfi.pc_offset < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 		printk("Can't analyze schedule() prologue at %p\n", schedule);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) arch_initcall(frame_info_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)  * Return saved PC of a blocked thread.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static unsigned long thread_saved_pc(struct task_struct *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	struct thread_struct *t = &tsk->thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	/* New born processes are a special case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	if (t->reg31 == (unsigned long) ret_from_fork)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 		return t->reg31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	if (schedule_mfi.pc_offset < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) #ifdef CONFIG_KALLSYMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /* generic stack unwinding function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 					      unsigned long *sp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 					      unsigned long pc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 					      unsigned long *ra)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	unsigned long low, high, irq_stack_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	struct mips_frame_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	unsigned long size, ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	struct pt_regs *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	int leaf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	if (!stack_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	 * IRQ stacks start at IRQ_STACK_START
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	 * task stacks at THREAD_SIZE - 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	low = stack_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 		high = stack_page + IRQ_STACK_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 		irq_stack_high = high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 		high = stack_page + THREAD_SIZE - 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 		irq_stack_high = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	 * If we reached the top of the interrupt stack, start unwinding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	 * the interrupted task stack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	if (unlikely(*sp == irq_stack_high)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 		unsigned long task_sp = *(unsigned long *)*sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 		 * Check that the pointer saved in the IRQ stack head points to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 		 * something within the stack of the current task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 		if (!object_is_on_stack((void *)task_sp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 		 * Follow pointer to tasks kernel stack frame where interrupted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 		 * state was saved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 		regs = (struct pt_regs *)task_sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 		pc = regs->cp0_epc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 		if (!user_mode(regs) && __kernel_text_address(pc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 			*sp = regs->regs[29];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 			*ra = regs->regs[31];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 			return pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	 * Return ra if an exception occurred at the first instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 	if (unlikely(ofs == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 		pc = *ra;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 		*ra = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 		return pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	info.func = (void *)(pc - ofs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 	info.func_size = ofs;	/* analyze from start to ofs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 	leaf = get_frame_info(&info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 	if (leaf < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	if (*sp < low || *sp + info.frame_size > high)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 	if (leaf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 		 * For some extreme cases, get_frame_info() can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 		 * consider wrongly a nested function as a leaf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 		 * one. In that cases avoid to return always the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 		 * same value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 		pc = pc != *ra ? *ra : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 		pc = ((unsigned long *)(*sp))[info.pc_offset];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	*sp += info.frame_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 	*ra = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 	return __kernel_text_address(pc) ? pc : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) EXPORT_SYMBOL(unwind_stack_by_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /* used by show_backtrace() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 			   unsigned long pc, unsigned long *ra)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 	unsigned long stack_page = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 	int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 	for_each_possible_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 		if (on_irq_stack(cpu, *sp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 			stack_page = (unsigned long)irq_stack[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 	if (!stack_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 		stack_page = (unsigned long)task_stack_page(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 	return unwind_stack_by_address(stack_page, sp, pc, ra);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)  * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) unsigned long get_wchan(struct task_struct *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 	unsigned long pc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) #ifdef CONFIG_KALLSYMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 	unsigned long sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 	unsigned long ra = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 	if (!task || task == current || task->state == TASK_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 	if (!task_stack_page(task))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) 	pc = thread_saved_pc(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) #ifdef CONFIG_KALLSYMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 	sp = task->thread.reg29 + schedule_mfi.frame_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 	while (in_sched_functions(pc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 		pc = unwind_stack(task, &sp, pc, &ra);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 	return pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) unsigned long mips_stack_top(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 	unsigned long top = TASK_SIZE & PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 	if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 		/* One page for branch delay slot "emulation" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 		top -= PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 	/* Space for the VDSO, data page & GIC user page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 	top -= PAGE_ALIGN(current->thread.abi->vdso->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 	top -= PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) 	top -= mips_gic_present() ? PAGE_SIZE : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 	/* Space for cache colour alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 	if (cpu_has_dc_aliases)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) 		top -= shm_align_mask + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 	/* Space to randomize the VDSO base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	if (current->flags & PF_RANDOMIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 		top -= VDSO_RANDOMIZE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) 	return top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)  * Don't forget that the stack pointer must be aligned on a 8 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)  * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) unsigned long arch_align_stack(unsigned long sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) 		sp -= get_random_int() & ~PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 	return sp & ALMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) static DEFINE_PER_CPU(call_single_data_t, backtrace_csd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static struct cpumask backtrace_csd_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) static void handle_backtrace(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) 	nmi_cpu_backtrace(get_irq_regs());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 	cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static void raise_backtrace(cpumask_t *mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) 	call_single_data_t *csd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 	int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 	for_each_cpu(cpu, mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) 		 * If we previously sent an IPI to the target CPU & it hasn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 		 * cleared its bit in the busy cpumask then it didn't handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 		 * our previous IPI & it's not safe for us to reuse the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 		 * call_single_data_t.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 		if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) 			pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 				cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 		csd = &per_cpu(backtrace_csd, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 		csd->func = handle_backtrace;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 		smp_call_function_single_async(cpu, csd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) 	nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) int mips_get_process_fp_mode(struct task_struct *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) 	int value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) 	if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) 		value |= PR_FP_MODE_FR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 	if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) 		value |= PR_FP_MODE_FRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 	return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static long prepare_for_fp_mode_switch(void *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) 	 * This is icky, but we use this to simply ensure that all CPUs have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) 	 * context switched, regardless of whether they were previously running
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 	 * kernel or user code. This ensures that no CPU that a mode-switching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) 	 * program may execute on keeps its FPU enabled (& in the old mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 	 * throughout the mode switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) 	const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) 	struct task_struct *t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) 	struct cpumask process_cpus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) 	int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) 	/* If nothing to change, return right away, successfully.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) 	if (value == mips_get_process_fp_mode(task))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) 	/* Only accept a mode change if 64-bit FP enabled for o32.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) 	if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) 	/* And only for o32 tasks.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) 	if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) 	/* Check the value is valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) 	if (value & ~known_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) 	/* Setting FRE without FR is not supported.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) 	if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) 	/* Avoid inadvertently triggering emulation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) 	if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) 	    !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) 	if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) 	/* FR = 0 not supported in MIPS R6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) 	if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) 	/* Indicate the new FP mode in each thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) 	for_each_thread(task, t) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) 		/* Update desired FP register width */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) 		if (value & PR_FP_MODE_FR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) 			clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) 			set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) 			clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) 		/* Update desired FP single layout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) 		if (value & PR_FP_MODE_FRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) 			set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) 			clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) 	 * We need to ensure that all threads in the process have switched mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) 	 * before returning, in order to allow userland to not worry about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) 	 * races. We can do this by forcing all CPUs that any thread in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) 	 * process may be running on to schedule something else - in this case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) 	 * prepare_for_fp_mode_switch().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) 	 * We begin by generating a mask of all CPUs that any thread in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) 	 * process may be running on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) 	cpumask_clear(&process_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) 	for_each_thread(task, t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) 		cpumask_set_cpu(task_cpu(t), &process_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) 	 * Now we schedule prepare_for_fp_mode_switch() on each of those CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) 	 * The CPUs may have rescheduled already since we switched mode or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) 	 * generated the cpumask, but that doesn't matter. If the task in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) 	 * process is scheduled out then our scheduling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) 	 * prepare_for_fp_mode_switch() will simply be redundant. If it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) 	 * scheduled in then it will already have picked up the new FP mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) 	 * whilst doing so.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) 	get_online_cpus();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) 	for_each_cpu_and(cpu, &process_cpus, cpu_online_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) 		work_on_cpu(cpu, prepare_for_fp_mode_switch, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) 	put_online_cpus();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) 	for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) 		/* k0/k1 are copied as zero. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) 		if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) 			uregs[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) 			uregs[i] = regs->regs[i - MIPS32_EF_R0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) 	uregs[MIPS32_EF_LO] = regs->lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) 	uregs[MIPS32_EF_HI] = regs->hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) 	uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) 	uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) 	uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) 	uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) 	for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) 		/* k0/k1 are copied as zero. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) 		if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) 			uregs[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) 			uregs[i] = regs->regs[i - MIPS64_EF_R0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) 	uregs[MIPS64_EF_LO] = regs->lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) 	uregs[MIPS64_EF_HI] = regs->hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) 	uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) 	uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) 	uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) 	uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) #endif /* CONFIG_64BIT */