Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * MIPS cacheinfo support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/cacheinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) /* Populates leaf and increments to next leaf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define populate_cache(cache, leaf, c_level, c_type)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) do {								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 	leaf->type = c_type;					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 	leaf->level = c_level;					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 	leaf->coherency_line_size = c->cache.linesz;		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 	leaf->number_of_sets = c->cache.sets;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	leaf->ways_of_associativity = c->cache.ways;		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	leaf->size = c->cache.linesz * c->cache.sets *		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 		c->cache.ways;					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	leaf++;							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) int init_cache_level(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	struct cpuinfo_mips *c = &current_cpu_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	int levels = 0, leaves = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	 * If Dcache is not set, we assume the cache structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	 * are not properly initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	if (c->dcache.waysize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		levels += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	leaves += (c->icache.waysize) ? 2 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	if (c->scache.waysize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		levels++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		leaves++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	if (c->tcache.waysize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		levels++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		leaves++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	this_cpu_ci->num_levels = levels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	this_cpu_ci->num_leaves = leaves;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static void fill_cpumask_siblings(int cpu, cpumask_t *cpu_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	int cpu1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	for_each_possible_cpu(cpu1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		if (cpus_are_siblings(cpu, cpu1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			cpumask_set_cpu(cpu1, cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static void fill_cpumask_cluster(int cpu, cpumask_t *cpu_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	int cpu1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	int cluster = cpu_cluster(&cpu_data[cpu]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	for_each_possible_cpu(cpu1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		if (cpu_cluster(&cpu_data[cpu1]) == cluster)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 			cpumask_set_cpu(cpu1, cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) int populate_cache_leaves(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct cpuinfo_mips *c = &current_cpu_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct cacheinfo *this_leaf = this_cpu_ci->info_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (c->icache.waysize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		/* L1 caches are per core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		fill_cpumask_siblings(cpu, &this_leaf->shared_cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		populate_cache(dcache, this_leaf, 1, CACHE_TYPE_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		fill_cpumask_siblings(cpu, &this_leaf->shared_cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		populate_cache(icache, this_leaf, 1, CACHE_TYPE_INST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		populate_cache(dcache, this_leaf, 1, CACHE_TYPE_UNIFIED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (c->scache.waysize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		/* L2 cache is per cluster */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		fill_cpumask_cluster(cpu, &this_leaf->shared_cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		populate_cache(scache, this_leaf, 2, CACHE_TYPE_UNIFIED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (c->tcache.waysize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	this_cpu_ci->cpu_map_populated = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }