Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  Cobalt time initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/i8253.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/gt64120.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define GT641XX_BASE_CLOCK	50000000	/* 50MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) void __init plat_time_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	u32 start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	int i = HZ / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	setup_pit_timer();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	gt641xx_set_base_clock(GT641XX_BASE_CLOCK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	 * MIPS counter frequency is measured during a 100msec interval
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	 * using GT64111 timer0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	while (!gt641xx_timer0_state())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	start = read_c0_count();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	while (i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		while (!gt641xx_timer0_state())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	end = read_c0_count();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	mips_hpt_frequency = (end - start) * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }