^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Setup pointers to hardware dependent routines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/gt64120.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <cobalt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) extern void cobalt_machine_restart(char *command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) extern void cobalt_machine_halt(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) const char *get_system_type(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) switch (cobalt_board_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) case COBALT_BRD_ID_QUBE1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) return "Cobalt Qube";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) case COBALT_BRD_ID_RAQ1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return "Cobalt RaQ";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) case COBALT_BRD_ID_QUBE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return "Cobalt Qube2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) case COBALT_BRD_ID_RAQ2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return "Cobalt RaQ2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) return "MIPS Cobalt";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * Cobalt doesn't have PS/2 keyboard/mouse interfaces,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * keyboard controller is never used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Also PCI-ISA bridge DMA controller is never used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static struct resource cobalt_reserved_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { /* dma1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .start = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .end = 0x1f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .name = "reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .flags = IORESOURCE_BUSY | IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { /* keyboard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .start = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .end = 0x6f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .name = "reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .flags = IORESOURCE_BUSY | IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { /* dma page reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .start = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .end = 0x8f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .name = "reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .flags = IORESOURCE_BUSY | IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { /* dma2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .start = 0xc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .end = 0xdf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .name = "reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .flags = IORESOURCE_BUSY | IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) void __init plat_mem_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) _machine_restart = cobalt_machine_restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) _machine_halt = cobalt_machine_halt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) pm_power_off = cobalt_machine_halt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* I/O port resource */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ioport_resource.end = 0x01ffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* These resources have been reserved by VIA SuperI/O chip. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) request_resource(&ioport_resource, cobalt_reserved_resources + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * Prom init. We read our one and only communication with the firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * Grab the amount of installed memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * Better boot loaders (CoLo) pass a command line too :-)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) void __init prom_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned long memsz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int argc, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) char **argv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) memsz = fw_arg0 & 0x7fff0000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) argc = fw_arg0 & 0x0000ffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) argv = (char **)fw_arg1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) for (i = 1; i < argc; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (i < (argc - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) memblock_add(0, memsz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) setup_8250_early_printk_port(CKSEG1ADDR(0x1c800000), 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) void __init prom_free_prom_memory(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* Nothing to do! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }