^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <asm/octeon/octeon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <asm/octeon/cvmx-ciu-defs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <asm/octeon/cvmx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define TIMER_NUM 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) static bool reset_stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct latency_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u64 io_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u64 cpu_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u64 timer_start1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) u64 timer_start2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u64 max_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u64 min_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u64 latency_sum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u64 average_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u64 interrupt_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static struct latency_info li;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static struct dentry *dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int show_latency(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u64 cpuclk, avg, max, min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct latency_info curr_li = li;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) cpuclk = octeon_get_clock_rate();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) max = (curr_li.max_latency * 1000000000) / cpuclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) min = (curr_li.min_latency * 1000000000) / cpuclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) avg = (curr_li.latency_sum * 1000000000) / (cpuclk * curr_li.interrupt_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) seq_printf(m, "cnt: %10lld, avg: %7lld ns, max: %7lld ns, min: %7lld ns\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) curr_li.interrupt_cnt, avg, max, min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int oct_ilm_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return single_open(file, show_latency, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static const struct file_operations oct_ilm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .open = oct_ilm_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int reset_statistics(void *data, u64 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) reset_stats = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) DEFINE_SIMPLE_ATTRIBUTE(reset_statistics_ops, NULL, reset_statistics, "%llu\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static void init_debugfs(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) dir = debugfs_create_dir("oct_ilm", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) debugfs_create_file("statistics", 0222, dir, NULL, &oct_ilm_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) debugfs_create_file("reset", 0222, dir, NULL, &reset_statistics_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static void init_latency_info(struct latency_info *li, int startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* interval in milli seconds after which the interrupt will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * be triggered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int interval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (startup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* Calculating by the amounts io clock and cpu clock would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * increment in interval amount of ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) li->io_interval = (octeon_get_io_clock_rate() * interval) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) li->cpu_interval = (octeon_get_clock_rate() * interval) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) li->timer_start1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) li->timer_start2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) li->max_latency = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) li->min_latency = (u64)-1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) li->latency_sum = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) li->interrupt_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static void start_timer(int timer, u64 interval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) union cvmx_ciu_timx timx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) timx.u64 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) timx.s.one_shot = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) timx.s.len = interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) raw_local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) li.timer_start1 = read_c0_cvmcount();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) cvmx_write_csr(CVMX_CIU_TIMX(timer), timx.u64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* Read it back to force wait until register is written. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) timx.u64 = cvmx_read_csr(CVMX_CIU_TIMX(timer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) li.timer_start2 = read_c0_cvmcount();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) raw_local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static irqreturn_t cvm_oct_ciu_timer_interrupt(int cpl, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u64 last_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u64 last_int_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (reset_stats) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) init_latency_info(&li, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) reset_stats = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) last_int_cnt = read_c0_cvmcount();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) last_latency = last_int_cnt - (li.timer_start1 + li.cpu_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) li.interrupt_cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) li.latency_sum += last_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (last_latency > li.max_latency)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) li.max_latency = last_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (last_latency < li.min_latency)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) li.min_latency = last_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) start_timer(TIMER_NUM, li.io_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static void disable_timer(int timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) union cvmx_ciu_timx timx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) timx.s.one_shot = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) timx.s.len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) cvmx_write_csr(CVMX_CIU_TIMX(timer), timx.u64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* Read it back to force immediate write of timer register*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) timx.u64 = cvmx_read_csr(CVMX_CIU_TIMX(timer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static __init int oct_ilm_module_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int irq = OCTEON_IRQ_TIMER0 + TIMER_NUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) init_debugfs();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) rc = request_irq(irq, cvm_oct_ciu_timer_interrupt, IRQF_NO_THREAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) "oct_ilm", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) WARN(1, "Could not acquire IRQ %d", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) init_latency_info(&li, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) start_timer(TIMER_NUM, li.io_interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) err_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) debugfs_remove_recursive(dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static __exit void oct_ilm_module_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) disable_timer(TIMER_NUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) debugfs_remove_recursive(dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) free_irq(OCTEON_IRQ_TIMER0 + TIMER_NUM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) module_exit(oct_ilm_module_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) module_init(oct_ilm_module_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MODULE_AUTHOR("Venkat Subbiah, Cavium");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MODULE_DESCRIPTION("Measures interrupt latency on Octeon chips.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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