Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2014 Kevin Cernekee <cernekee@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define pr_fmt(fmt)		"bmips-dma: " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/dma-direction.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/printk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/bmips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * BCM338x has configurable address translation windows which allow the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * peripherals' DMA addresses to be different from the Zephyr-visible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * physical addresses.  e.g. usb_dma_addr = zephyr_pa ^ 0x08000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * If the "brcm,ubus" node has a "dma-ranges" property we will enable this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * translation globally using the provided information.  This implements a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * very limited subset of "dma-ranges" support and it will probably be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * replaced by a more generic version later.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) struct bmips_dma_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	u32			child_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	u32			parent_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u32			size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static struct bmips_dma_range *bmips_dma_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define FLUSH_RAC		0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) dma_addr_t phys_to_dma(struct device *dev, phys_addr_t pa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct bmips_dma_range *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	for (r = bmips_dma_ranges; r && r->size; r++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		if (pa >= r->child_addr &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		    pa < (r->child_addr + r->size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			return pa - r->child_addr + r->parent_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	return pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dma_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	struct bmips_dma_range *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	for (r = bmips_dma_ranges; r && r->size; r++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		if (dma_addr >= r->parent_addr &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		    dma_addr < (r->parent_addr + r->size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 			return dma_addr - r->parent_addr + r->child_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	return dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) void arch_sync_dma_for_cpu_all(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	void __iomem *cbr = BMIPS_GET_CBR();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	u32 cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	if (boot_cpu_type() != CPU_BMIPS3300 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	    boot_cpu_type() != CPU_BMIPS4350 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	    boot_cpu_type() != CPU_BMIPS4380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	/* Flush stale data out of the readahead cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	__raw_readl(cbr + BMIPS_RAC_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static int __init bmips_init_dma_ranges(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	struct device_node *np =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		of_find_compatible_node(NULL, NULL, "brcm,ubus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	const __be32 *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct bmips_dma_range *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	data = of_get_property(np, "dma-ranges", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		goto out_good;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	len /= sizeof(*data) * 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		goto out_bad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	/* add a dummy (zero) entry at the end as a sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	bmips_dma_ranges = kcalloc(len + 1, sizeof(struct bmips_dma_range),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				   GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	if (!bmips_dma_ranges)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		goto out_bad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	for (r = bmips_dma_ranges; len; len--, r++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		r->child_addr = be32_to_cpup(data++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		r->parent_addr = be32_to_cpup(data++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		r->size = be32_to_cpup(data++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) out_good:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) out_bad:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	pr_err("error parsing dma-ranges property\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) arch_initcall(bmips_init_dma_ranges);