^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Broadcom BCM63xx flash registration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <bcm63xx_cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <bcm63xx_dev_flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <bcm63xx_regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <bcm63xx_io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static struct mtd_partition mtd_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .name = "cfe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .offset = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .size = 0x40000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static struct physmap_flash_data flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .parts = mtd_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .part_probe_types = bcm63xx_part_types,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static struct resource mtd_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .start = 0, /* filled at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .end = 0, /* filled at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static struct platform_device mtd_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .resource = mtd_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .num_resources = ARRAY_SIZE(mtd_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .platform_data = &flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int __init bcm63xx_detect_flash_type(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) switch (bcm63xx_get_cpu_id()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) case BCM6328_CPU_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return BCM63XX_FLASH_TYPE_SERIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return BCM63XX_FLASH_TYPE_NAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case BCM6338_CPU_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case BCM6345_CPU_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) case BCM6348_CPU_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* no way to auto detect so assume parallel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return BCM63XX_FLASH_TYPE_PARALLEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) case BCM3368_CPU_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) case BCM6358_CPU_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return BCM63XX_FLASH_TYPE_PARALLEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return BCM63XX_FLASH_TYPE_SERIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) case BCM6362_CPU_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return BCM63XX_FLASH_TYPE_SERIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return BCM63XX_FLASH_TYPE_NAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) case BCM6368_CPU_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) case STRAPBUS_6368_BOOT_SEL_NAND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return BCM63XX_FLASH_TYPE_NAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) case STRAPBUS_6368_BOOT_SEL_SERIAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return BCM63XX_FLASH_TYPE_SERIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) case STRAPBUS_6368_BOOT_SEL_PARALLEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return BCM63XX_FLASH_TYPE_PARALLEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int __init bcm63xx_flash_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int flash_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) flash_type = bcm63xx_detect_flash_type();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) switch (flash_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) case BCM63XX_FLASH_TYPE_PARALLEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* read base address of boot chip select (0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) val = bcm_mpi_readl(MPI_CSBASE_REG(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) val &= MPI_CSBASE_BASE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) mtd_resources[0].start = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) mtd_resources[0].end = 0x1FFFFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return platform_device_register(&mtd_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) case BCM63XX_FLASH_TYPE_SERIAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) pr_warn("unsupported serial flash detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) case BCM63XX_FLASH_TYPE_NAND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) pr_warn("unsupported NAND flash detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) pr_err("flash detection failed for BCM%x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) bcm63xx_get_cpu_id(), flash_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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